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rtc: ac100: Add clk output support
The AC100's RTC side has 3 clock outputs on external pins, which can provide a clock signal to the SoC or other modules, such as WiFi or GSM modules. Support this with a custom clk driver integrated with the rtc driver. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Chen-Yu Tsai
Lee Jones
parent
d00a18a42c
commit
04940631b8
1 changed files with 302 additions and 0 deletions
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@ -16,6 +16,7 @@
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*/
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#include <linux/bcd.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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@ -31,6 +32,15 @@
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/* Control register */
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#define AC100_RTC_CTRL_24HOUR BIT(0)
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/* Clock output register bits */
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#define AC100_CLKOUT_PRE_DIV_SHIFT 5
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#define AC100_CLKOUT_PRE_DIV_WIDTH 3
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#define AC100_CLKOUT_MUX_SHIFT 4
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#define AC100_CLKOUT_MUX_WIDTH 1
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#define AC100_CLKOUT_DIV_SHIFT 1
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#define AC100_CLKOUT_DIV_WIDTH 3
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#define AC100_CLKOUT_EN BIT(0)
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/* RTC */
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#define AC100_RTC_SEC_MASK GENMASK(6, 0)
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#define AC100_RTC_MIN_MASK GENMASK(6, 0)
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@ -67,14 +77,292 @@
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#define AC100_YEAR_MAX 2069
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#define AC100_YEAR_OFF (AC100_YEAR_MIN - 1900)
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struct ac100_clkout {
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struct clk_hw hw;
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struct regmap *regmap;
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u8 offset;
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};
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#define to_ac100_clkout(_hw) container_of(_hw, struct ac100_clkout, hw)
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#define AC100_RTC_32K_NAME "ac100-rtc-32k"
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#define AC100_RTC_32K_RATE 32768
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#define AC100_CLKOUT_NUM 3
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static const char * const ac100_clkout_names[AC100_CLKOUT_NUM] = {
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"ac100-cko1-rtc",
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"ac100-cko2-rtc",
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"ac100-cko3-rtc",
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};
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struct ac100_rtc_dev {
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struct rtc_device *rtc;
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struct device *dev;
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struct regmap *regmap;
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int irq;
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unsigned long alarm;
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struct clk_hw *rtc_32k_clk;
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struct ac100_clkout clks[AC100_CLKOUT_NUM];
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struct clk_hw_onecell_data *clk_data;
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};
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/**
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* Clock controls for 3 clock output pins
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*/
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static const struct clk_div_table ac100_clkout_prediv[] = {
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{ .val = 0, .div = 1 },
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{ .val = 1, .div = 2 },
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{ .val = 2, .div = 4 },
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{ .val = 3, .div = 8 },
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{ .val = 4, .div = 16 },
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{ .val = 5, .div = 32 },
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{ .val = 6, .div = 64 },
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{ .val = 7, .div = 122 },
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{ },
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};
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/* Abuse the fact that one parent is 32768 Hz, and the other is 4 MHz */
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static unsigned long ac100_clkout_recalc_rate(struct clk_hw *hw,
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unsigned long prate)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg, div;
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regmap_read(clk->regmap, clk->offset, ®);
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/* Handle pre-divider first */
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if (prate != AC100_RTC_32K_RATE) {
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div = (reg >> AC100_CLKOUT_PRE_DIV_SHIFT) &
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((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1);
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prate = divider_recalc_rate(hw, prate, div,
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ac100_clkout_prediv, 0);
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}
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div = (reg >> AC100_CLKOUT_DIV_SHIFT) &
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(BIT(AC100_CLKOUT_DIV_WIDTH) - 1);
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return divider_recalc_rate(hw, prate, div, NULL,
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CLK_DIVIDER_POWER_OF_TWO);
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}
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static long ac100_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long prate)
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{
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unsigned long best_rate = 0, tmp_rate, tmp_prate;
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int i;
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if (prate == AC100_RTC_32K_RATE)
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return divider_round_rate(hw, rate, &prate, NULL,
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AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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for (i = 0; ac100_clkout_prediv[i].div; i++) {
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tmp_prate = DIV_ROUND_UP(prate, ac100_clkout_prediv[i].val);
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tmp_rate = divider_round_rate(hw, rate, &tmp_prate, NULL,
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AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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if (tmp_rate > rate)
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continue;
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if (rate - tmp_rate < best_rate - tmp_rate)
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best_rate = tmp_rate;
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}
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return best_rate;
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}
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static int ac100_clkout_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct clk_hw *best_parent;
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unsigned long best = 0;
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int i, num_parents = clk_hw_get_num_parents(hw);
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for (i = 0; i < num_parents; i++) {
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struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i);
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unsigned long tmp, prate = clk_hw_get_rate(parent);
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tmp = ac100_clkout_round_rate(hw, req->rate, prate);
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if (tmp > req->rate)
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continue;
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if (req->rate - tmp < req->rate - best) {
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best = tmp;
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best_parent = parent;
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}
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}
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if (!best)
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return -EINVAL;
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req->best_parent_hw = best_parent;
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req->best_parent_rate = best;
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req->rate = best;
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return 0;
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}
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static int ac100_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long prate)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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int div = 0, pre_div = 0;
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do {
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div = divider_get_val(rate * ac100_clkout_prediv[pre_div].div,
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prate, NULL, AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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if (div >= 0)
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break;
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} while (prate != AC100_RTC_32K_RATE &&
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ac100_clkout_prediv[++pre_div].div);
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if (div < 0)
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return div;
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pre_div = ac100_clkout_prediv[pre_div].val;
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regmap_update_bits(clk->regmap, clk->offset,
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((1 << AC100_CLKOUT_DIV_WIDTH) - 1) << AC100_CLKOUT_DIV_SHIFT |
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((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1) << AC100_CLKOUT_PRE_DIV_SHIFT,
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(div - 1) << AC100_CLKOUT_DIV_SHIFT |
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(pre_div - 1) << AC100_CLKOUT_PRE_DIV_SHIFT);
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return 0;
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}
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static int ac100_clkout_prepare(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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return regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN,
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AC100_CLKOUT_EN);
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}
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static void ac100_clkout_unprepare(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN, 0);
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}
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static int ac100_clkout_is_prepared(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg;
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regmap_read(clk->regmap, clk->offset, ®);
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return reg & AC100_CLKOUT_EN;
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}
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static u8 ac100_clkout_get_parent(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg;
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regmap_read(clk->regmap, clk->offset, ®);
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return (reg >> AC100_CLKOUT_MUX_SHIFT) & 0x1;
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}
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static int ac100_clkout_set_parent(struct clk_hw *hw, u8 index)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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return regmap_update_bits(clk->regmap, clk->offset,
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BIT(AC100_CLKOUT_MUX_SHIFT),
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index ? BIT(AC100_CLKOUT_MUX_SHIFT) : 0);
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}
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static const struct clk_ops ac100_clkout_ops = {
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.prepare = ac100_clkout_prepare,
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.unprepare = ac100_clkout_unprepare,
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.is_prepared = ac100_clkout_is_prepared,
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.recalc_rate = ac100_clkout_recalc_rate,
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.determine_rate = ac100_clkout_determine_rate,
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.get_parent = ac100_clkout_get_parent,
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.set_parent = ac100_clkout_set_parent,
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.set_rate = ac100_clkout_set_rate,
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};
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static int ac100_rtc_register_clks(struct ac100_rtc_dev *chip)
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{
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struct device_node *np = chip->dev->of_node;
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const char *parents[2] = {AC100_RTC_32K_NAME};
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int i, ret;
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chip->clk_data = devm_kzalloc(chip->dev, sizeof(*chip->clk_data) +
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sizeof(*chip->clk_data->hws) *
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AC100_CLKOUT_NUM,
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GFP_KERNEL);
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if (!chip->clk_data)
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return -ENOMEM;
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chip->rtc_32k_clk = clk_hw_register_fixed_rate(chip->dev,
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AC100_RTC_32K_NAME,
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NULL, 0,
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AC100_RTC_32K_RATE);
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if (IS_ERR(chip->rtc_32k_clk)) {
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ret = PTR_ERR(chip->rtc_32k_clk);
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dev_err(chip->dev, "Failed to register RTC-32k clock: %d\n",
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ret);
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return ret;
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}
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parents[1] = of_clk_get_parent_name(np, 0);
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if (!parents[1]) {
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dev_err(chip->dev, "Failed to get ADDA 4M clock\n");
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return -EINVAL;
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}
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for (i = 0; i < AC100_CLKOUT_NUM; i++) {
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struct ac100_clkout *clk = &chip->clks[i];
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struct clk_init_data init = {
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.name = ac100_clkout_names[i],
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.ops = &ac100_clkout_ops,
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.parent_names = parents,
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.num_parents = ARRAY_SIZE(parents),
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.flags = 0,
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};
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clk->regmap = chip->regmap;
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clk->offset = AC100_CLKOUT_CTRL1 + i;
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clk->hw.init = &init;
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ret = devm_clk_hw_register(chip->dev, &clk->hw);
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if (ret) {
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dev_err(chip->dev, "Failed to register clk '%s': %d\n",
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init.name, ret);
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goto err_unregister_rtc_32k;
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}
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chip->clk_data->hws[i] = &clk->hw;
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}
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chip->clk_data->num = i;
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ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, chip->clk_data);
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if (ret)
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goto err_unregister_rtc_32k;
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return 0;
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err_unregister_rtc_32k:
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clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);
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return ret;
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}
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static void ac100_rtc_unregister_clks(struct ac100_rtc_dev *chip)
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{
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of_clk_del_provider(chip->dev->of_node);
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clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);
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}
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/**
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* RTC related bits
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*/
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static int ac100_rtc_get_time(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
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@ -300,11 +588,24 @@ static int ac100_rtc_probe(struct platform_device *pdev)
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return PTR_ERR(chip->rtc);
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}
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ret = ac100_rtc_register_clks(chip);
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if (ret)
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return ret;
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dev_info(&pdev->dev, "RTC enabled\n");
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return 0;
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}
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static int ac100_rtc_remove(struct platform_device *pdev)
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{
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struct ac100_rtc_dev *chip = platform_get_drvdata(pdev);
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ac100_rtc_unregister_clks(chip);
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return 0;
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}
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static const struct of_device_id ac100_rtc_match[] = {
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{ .compatible = "x-powers,ac100-rtc" },
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{ },
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@ -313,6 +614,7 @@ MODULE_DEVICE_TABLE(of, ac100_rtc_match);
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static struct platform_driver ac100_rtc_driver = {
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.probe = ac100_rtc_probe,
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.remove = ac100_rtc_remove,
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.driver = {
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.name = "ac100-rtc",
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.of_match_table = of_match_ptr(ac100_rtc_match),
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