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Bluetooth: btintel_pcie: Add support for device coredump
1. Driver registers device coredump callback 2. Dumps firmware traces as part of coredump Co-developed-by: Vijay Satija <vijay.satija@intel.com> Signed-off-by: Vijay Satija <vijay.satija@intel.com> Signed-off-by: Kiran K <kiran.k@intel.com> Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This commit is contained in:
parent
1f04b0e5e3
commit
07e6bddb54
3 changed files with 291 additions and 7 deletions
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@ -190,7 +190,6 @@ enum {
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struct btintel_data {
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DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
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int (*acpi_reset_method)(struct hci_dev *hdev);
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u32 cnvi_top;
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};
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#define btintel_set_flag(hdev, nr) \
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@ -59,6 +59,8 @@ MODULE_DEVICE_TABLE(pci, btintel_pcie_table);
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#define BTINTEL_PCIE_MAGIC_NUM 0xA5A5A5A5
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#define BTINTEL_PCIE_TRIGGER_REASON_USER_TRIGGER 0x17A2
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/* Alive interrupt context */
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enum {
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BTINTEL_PCIE_ROM,
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@ -375,6 +377,25 @@ static void btintel_pcie_mac_init(struct btintel_pcie_data *data)
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btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG, reg);
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}
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static int btintel_pcie_add_dmp_data(struct hci_dev *hdev, const void *data, int size)
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{
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struct sk_buff *skb;
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int err;
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skb = alloc_skb(size, GFP_ATOMIC);
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if (!skb)
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return -ENOMEM;
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skb_put_data(skb, data, size);
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err = hci_devcd_append(hdev, skb);
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if (err) {
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bt_dev_err(hdev, "Failed to append data in the coredump");
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return err;
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}
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return 0;
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}
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static int btintel_pcie_get_mac_access(struct btintel_pcie_data *data)
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{
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u32 reg;
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@ -419,6 +440,194 @@ static void btintel_pcie_release_mac_access(struct btintel_pcie_data *data)
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btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG, reg);
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}
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static void btintel_pcie_copy_tlv(struct sk_buff *skb, enum btintel_pcie_tlv_type type,
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void *data, int size)
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{
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struct intel_tlv *tlv;
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tlv = skb_put(skb, sizeof(*tlv) + size);
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tlv->type = type;
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tlv->len = size;
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memcpy(tlv->val, data, tlv->len);
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}
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static int btintel_pcie_read_dram_buffers(struct btintel_pcie_data *data)
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{
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u32 offset, prev_size, wr_ptr_status, dump_size, i;
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struct btintel_pcie_dbgc *dbgc = &data->dbgc;
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u8 buf_idx, dump_time_len, fw_build;
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struct hci_dev *hdev = data->hdev;
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struct intel_tlv *tlv;
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struct timespec64 now;
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struct sk_buff *skb;
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struct tm tm_now;
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char buf[256];
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u16 hdr_len;
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int ret;
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wr_ptr_status = btintel_pcie_rd_dev_mem(data, BTINTEL_PCIE_DBGC_CUR_DBGBUFF_STATUS);
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offset = wr_ptr_status & BTINTEL_PCIE_DBG_OFFSET_BIT_MASK;
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buf_idx = BTINTEL_PCIE_DBGC_DBG_BUF_IDX(wr_ptr_status);
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if (buf_idx > dbgc->count) {
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bt_dev_warn(hdev, "Buffer index is invalid");
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return -EINVAL;
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}
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prev_size = buf_idx * BTINTEL_PCIE_DBGC_BUFFER_SIZE;
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if (prev_size + offset >= prev_size)
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data->dmp_hdr.write_ptr = prev_size + offset;
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else
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return -EINVAL;
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ktime_get_real_ts64(&now);
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time64_to_tm(now.tv_sec, 0, &tm_now);
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dump_time_len = snprintf(buf, sizeof(buf), "Dump Time: %02d-%02d-%04ld %02d:%02d:%02d",
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tm_now.tm_mday, tm_now.tm_mon + 1, tm_now.tm_year + 1900,
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tm_now.tm_hour, tm_now.tm_min, tm_now.tm_sec);
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fw_build = snprintf(buf + dump_time_len, sizeof(buf) - dump_time_len,
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"Firmware Timestamp: Year %u WW %02u buildtype %u build %u",
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2000 + (data->dmp_hdr.fw_timestamp >> 8),
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data->dmp_hdr.fw_timestamp & 0xff, data->dmp_hdr.fw_build_type,
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data->dmp_hdr.fw_build_num);
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hdr_len = sizeof(*tlv) + sizeof(data->dmp_hdr.cnvi_bt) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.write_ptr) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.wrap_ctr) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.trigger_reason) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.fw_git_sha1) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.cnvr_top) +
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sizeof(*tlv) + sizeof(data->dmp_hdr.cnvi_top) +
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sizeof(*tlv) + dump_time_len +
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sizeof(*tlv) + fw_build;
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dump_size = hdr_len + sizeof(hdr_len);
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skb = alloc_skb(dump_size, GFP_KERNEL);
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if (!skb)
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return -ENOMEM;
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/* Add debug buffers data length to dump size */
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dump_size += BTINTEL_PCIE_DBGC_BUFFER_SIZE * dbgc->count;
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ret = hci_devcd_init(hdev, dump_size);
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if (ret) {
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bt_dev_err(hdev, "Failed to init devcoredump, err %d", ret);
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kfree_skb(skb);
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return ret;
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}
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skb_put_data(skb, &hdr_len, sizeof(hdr_len));
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btintel_pcie_copy_tlv(skb, BTINTEL_CNVI_BT, &data->dmp_hdr.cnvi_bt,
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sizeof(data->dmp_hdr.cnvi_bt));
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btintel_pcie_copy_tlv(skb, BTINTEL_WRITE_PTR, &data->dmp_hdr.write_ptr,
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sizeof(data->dmp_hdr.write_ptr));
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data->dmp_hdr.wrap_ctr = btintel_pcie_rd_dev_mem(data,
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BTINTEL_PCIE_DBGC_DBGBUFF_WRAP_ARND);
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btintel_pcie_copy_tlv(skb, BTINTEL_WRAP_CTR, &data->dmp_hdr.wrap_ctr,
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sizeof(data->dmp_hdr.wrap_ctr));
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btintel_pcie_copy_tlv(skb, BTINTEL_TRIGGER_REASON, &data->dmp_hdr.trigger_reason,
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sizeof(data->dmp_hdr.trigger_reason));
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btintel_pcie_copy_tlv(skb, BTINTEL_FW_SHA, &data->dmp_hdr.fw_git_sha1,
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sizeof(data->dmp_hdr.fw_git_sha1));
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btintel_pcie_copy_tlv(skb, BTINTEL_CNVR_TOP, &data->dmp_hdr.cnvr_top,
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sizeof(data->dmp_hdr.cnvr_top));
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btintel_pcie_copy_tlv(skb, BTINTEL_CNVI_TOP, &data->dmp_hdr.cnvi_top,
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sizeof(data->dmp_hdr.cnvi_top));
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btintel_pcie_copy_tlv(skb, BTINTEL_DUMP_TIME, buf, dump_time_len);
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btintel_pcie_copy_tlv(skb, BTINTEL_FW_BUILD, buf + dump_time_len, fw_build);
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ret = hci_devcd_append(hdev, skb);
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if (ret)
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goto exit_err;
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for (i = 0; i < dbgc->count; i++) {
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ret = btintel_pcie_add_dmp_data(hdev, dbgc->bufs[i].data,
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BTINTEL_PCIE_DBGC_BUFFER_SIZE);
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if (ret)
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break;
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}
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exit_err:
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hci_devcd_complete(hdev);
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return ret;
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}
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static void btintel_pcie_dump_traces(struct hci_dev *hdev)
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{
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struct btintel_pcie_data *data = hci_get_drvdata(hdev);
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int ret = 0;
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ret = btintel_pcie_get_mac_access(data);
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if (ret) {
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bt_dev_err(hdev, "Failed to get mac access: (%d)", ret);
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return;
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}
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ret = btintel_pcie_read_dram_buffers(data);
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btintel_pcie_release_mac_access(data);
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if (ret)
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bt_dev_err(hdev, "Failed to dump traces: (%d)", ret);
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}
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static void btintel_pcie_dump_hdr(struct hci_dev *hdev, struct sk_buff *skb)
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{
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struct btintel_pcie_data *data = hci_get_drvdata(hdev);
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u16 len = skb->len;
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u16 *hdrlen_ptr;
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char buf[80];
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hdrlen_ptr = skb_put_zero(skb, sizeof(len));
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snprintf(buf, sizeof(buf), "Controller Name: 0x%X\n",
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INTEL_HW_VARIANT(data->dmp_hdr.cnvi_bt));
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skb_put_data(skb, buf, strlen(buf));
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snprintf(buf, sizeof(buf), "Firmware Build Number: %u\n",
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data->dmp_hdr.fw_build_num);
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skb_put_data(skb, buf, strlen(buf));
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snprintf(buf, sizeof(buf), "Driver: %s\n", data->dmp_hdr.driver_name);
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skb_put_data(skb, buf, strlen(buf));
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snprintf(buf, sizeof(buf), "Vendor: Intel\n");
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skb_put_data(skb, buf, strlen(buf));
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*hdrlen_ptr = skb->len - len;
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}
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static void btintel_pcie_dump_notify(struct hci_dev *hdev, int state)
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{
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struct btintel_pcie_data *data = hci_get_drvdata(hdev);
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switch (state) {
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case HCI_DEVCOREDUMP_IDLE:
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data->dmp_hdr.state = HCI_DEVCOREDUMP_IDLE;
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break;
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case HCI_DEVCOREDUMP_ACTIVE:
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data->dmp_hdr.state = HCI_DEVCOREDUMP_ACTIVE;
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break;
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case HCI_DEVCOREDUMP_TIMEOUT:
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case HCI_DEVCOREDUMP_ABORT:
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case HCI_DEVCOREDUMP_DONE:
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data->dmp_hdr.state = HCI_DEVCOREDUMP_IDLE;
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break;
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}
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}
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/* This function enables BT function by setting BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT bit in
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* BTINTEL_PCIE_CSR_FUNC_CTRL_REG register and wait for MSI-X with
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* BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0.
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@ -883,7 +1092,6 @@ static int btintel_pcie_recv_frame(struct btintel_pcie_data *data,
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static void btintel_pcie_read_hwexp(struct btintel_pcie_data *data)
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{
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struct btintel_data *intel_data = hci_get_priv(data->hdev);
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int len, err, offset, pending;
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struct sk_buff *skb;
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u8 *buf, prefix[64];
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@ -898,11 +1106,11 @@ static void btintel_pcie_read_hwexp(struct btintel_pcie_data *data)
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struct tlv *tlv;
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switch (intel_data->cnvi_top & 0xfff) {
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switch (data->dmp_hdr.cnvi_top & 0xfff) {
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case BTINTEL_CNVI_BLAZARI:
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case BTINTEL_CNVI_BLAZARIW:
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/* only from step B0 onwards */
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if (INTEL_CNVX_TOP_STEP(intel_data->cnvi_top) != 0x01)
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if (INTEL_CNVX_TOP_STEP(data->dmp_hdr.cnvi_top) != 0x01)
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return;
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len = BTINTEL_PCIE_BLZR_HWEXP_SIZE; /* exception data length */
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addr = BTINTEL_PCIE_BLZR_HWEXP_DMP_ADDR;
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@ -912,7 +1120,7 @@ static void btintel_pcie_read_hwexp(struct btintel_pcie_data *data)
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addr = BTINTEL_PCIE_SCP_HWEXP_DMP_ADDR;
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break;
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default:
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bt_dev_err(data->hdev, "Unsupported cnvi 0x%8.8x", intel_data->cnvi_top);
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bt_dev_err(data->hdev, "Unsupported cnvi 0x%8.8x", data->dmp_hdr.cnvi_top);
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return;
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}
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@ -1017,6 +1225,11 @@ static void btintel_pcie_rx_work(struct work_struct *work)
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clear_bit(BTINTEL_PCIE_HWEXP_INPROGRESS, &data->flags);
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}
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if (test_bit(BTINTEL_PCIE_COREDUMP_INPROGRESS, &data->flags)) {
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btintel_pcie_dump_traces(data->hdev);
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clear_bit(BTINTEL_PCIE_COREDUMP_INPROGRESS, &data->flags);
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}
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/* Process the sk_buf in queue and send to the HCI layer */
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while ((skb = skb_dequeue(&data->rx_skb_q))) {
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err = btintel_pcie_recv_frame(data, skb);
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@ -1702,7 +1915,7 @@ static void btintel_pcie_release_hdev(struct btintel_pcie_data *data)
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static int btintel_pcie_setup_internal(struct hci_dev *hdev)
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{
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struct btintel_data *data = hci_get_priv(hdev);
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struct btintel_pcie_data *data = hci_get_drvdata(hdev);
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const u8 param[1] = { 0xFF };
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struct intel_version_tlv ver_tlv;
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struct sk_buff *skb;
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@ -1741,7 +1954,6 @@ static int btintel_pcie_setup_internal(struct hci_dev *hdev)
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goto exit_error;
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}
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data->cnvi_top = ver_tlv.cnvi_top;
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switch (INTEL_HW_PLATFORM(ver_tlv.cnvi_bt)) {
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case 0x37:
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break;
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@ -1787,6 +1999,23 @@ static int btintel_pcie_setup_internal(struct hci_dev *hdev)
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break;
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}
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data->dmp_hdr.cnvi_top = ver_tlv.cnvi_top;
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data->dmp_hdr.cnvr_top = ver_tlv.cnvr_top;
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data->dmp_hdr.fw_timestamp = ver_tlv.timestamp;
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data->dmp_hdr.fw_build_type = ver_tlv.build_type;
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data->dmp_hdr.fw_build_num = ver_tlv.build_num;
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data->dmp_hdr.cnvi_bt = ver_tlv.cnvi_bt;
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if (ver_tlv.img_type == 0x02 || ver_tlv.img_type == 0x03)
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data->dmp_hdr.fw_git_sha1 = ver_tlv.git_sha1;
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err = hci_devcd_register(hdev, btintel_pcie_dump_traces, btintel_pcie_dump_hdr,
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btintel_pcie_dump_notify);
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if (err) {
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bt_dev_err(hdev, "Failed to register coredump (%d)", err);
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goto exit_error;
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}
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btintel_print_fseq_info(hdev);
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exit_error:
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kfree_skb(skb);
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@ -1851,6 +2080,7 @@ static int btintel_pcie_setup_hdev(struct btintel_pcie_data *data)
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goto exit_error;
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}
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data->dmp_hdr.driver_name = KBUILD_MODNAME;
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return 0;
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exit_error:
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@ -1963,11 +2193,28 @@ static void btintel_pcie_remove(struct pci_dev *pdev)
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pci_set_drvdata(pdev, NULL);
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}
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#ifdef CONFIG_DEV_COREDUMP
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static void btintel_pcie_coredump(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct btintel_pcie_data *data = pci_get_drvdata(pdev);
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if (test_and_set_bit(BTINTEL_PCIE_COREDUMP_INPROGRESS, &data->flags))
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return;
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data->dmp_hdr.trigger_reason = BTINTEL_PCIE_TRIGGER_REASON_USER_TRIGGER;
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queue_work(data->workqueue, &data->rx_work);
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}
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#endif
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static struct pci_driver btintel_pcie_driver = {
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.name = KBUILD_MODNAME,
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.id_table = btintel_pcie_table,
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.probe = btintel_pcie_probe,
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.remove = btintel_pcie_remove,
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#ifdef CONFIG_DEV_COREDUMP
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.driver.coredump = btintel_pcie_coredump
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#endif
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};
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module_pci_driver(btintel_pcie_driver);
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@ -56,6 +56,15 @@
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#define BTINTEL_PCIE_CSR_MSIX_IVAR_BASE (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0880)
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#define BTINTEL_PCIE_CSR_MSIX_IVAR(cause) (BTINTEL_PCIE_CSR_MSIX_IVAR_BASE + (cause))
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/* IOSF Debug Register */
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#define BTINTEL_PCIE_DBGC_BASE_ADDR (0xf3800300)
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#define BTINTEL_PCIE_DBGC_CUR_DBGBUFF_STATUS (BTINTEL_PCIE_DBGC_BASE_ADDR + 0x1C)
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#define BTINTEL_PCIE_DBGC_DBGBUFF_WRAP_ARND (BTINTEL_PCIE_DBGC_BASE_ADDR + 0x2C)
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#define BTINTEL_PCIE_DBG_IDX_BIT_MASK 0x0F
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#define BTINTEL_PCIE_DBGC_DBG_BUF_IDX(data) (((data) >> 24) & BTINTEL_PCIE_DBG_IDX_BIT_MASK)
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#define BTINTEL_PCIE_DBG_OFFSET_BIT_MASK 0xFFFFFF
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/* The DRAM buffer count, each buffer size, and
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* fragment buffer size
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*/
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@ -97,6 +106,19 @@ enum {
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enum {
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BTINTEL_PCIE_CORE_HALTED,
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BTINTEL_PCIE_HWEXP_INPROGRESS,
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BTINTEL_PCIE_COREDUMP_INPROGRESS
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};
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||||
|
||||
enum btintel_pcie_tlv_type {
|
||||
BTINTEL_CNVI_BT,
|
||||
BTINTEL_WRITE_PTR,
|
||||
BTINTEL_WRAP_CTR,
|
||||
BTINTEL_TRIGGER_REASON,
|
||||
BTINTEL_FW_SHA,
|
||||
BTINTEL_CNVR_TOP,
|
||||
BTINTEL_CNVI_TOP,
|
||||
BTINTEL_DUMP_TIME,
|
||||
BTINTEL_FW_BUILD,
|
||||
};
|
||||
|
||||
#define BTINTEL_PCIE_MSIX_NON_AUTO_CLEAR_CAUSE BIT(7)
|
||||
|
|
@ -371,6 +393,21 @@ struct btintel_pcie_dbgc {
|
|||
struct data_buf *bufs;
|
||||
};
|
||||
|
||||
struct btintel_pcie_dump_header {
|
||||
const char *driver_name;
|
||||
u32 cnvi_top;
|
||||
u32 cnvr_top;
|
||||
u16 fw_timestamp;
|
||||
u8 fw_build_type;
|
||||
u32 fw_build_num;
|
||||
u32 fw_git_sha1;
|
||||
u32 cnvi_bt;
|
||||
u32 write_ptr;
|
||||
u32 wrap_ctr;
|
||||
u16 trigger_reason;
|
||||
int state;
|
||||
};
|
||||
|
||||
/* struct btintel_pcie_data
|
||||
* @pdev: pci device
|
||||
* @hdev: hdev device
|
||||
|
|
@ -452,6 +489,7 @@ struct btintel_pcie_data {
|
|||
struct rxq rxq;
|
||||
u32 alive_intr_ctxt;
|
||||
struct btintel_pcie_dbgc dbgc;
|
||||
struct btintel_pcie_dump_header dmp_hdr;
|
||||
};
|
||||
|
||||
static inline u32 btintel_pcie_rd_reg32(struct btintel_pcie_data *data,
|
||||
|
|
|
|||
Loading…
Reference in a new issue