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	crypto: crct10dif - Glue code to cast accelerated CRCT10DIF assembly as a crypto transform
Glue code that plugs the PCLMULQDQ accelerated CRC T10 DIF hash into the crypto framework. The config CRYPTO_CRCT10DIF_PCLMUL should be turned on to enable the feature. The crc_t10dif crypto library function will use this faster algorithm when crct10dif_pclmul module is loaded. Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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					 3 changed files with 164 additions and 0 deletions
				
			
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			@ -29,6 +29,7 @@ obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
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obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o
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obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
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obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
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obj-$(CONFIG_CRYPTO_CRCT10DIF_PCLMUL) += crct10dif-pclmul.o
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# These modules require assembler to support AVX.
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ifeq ($(avx_supported),yes)
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			@ -87,3 +88,4 @@ crc32c-intel-$(CONFIG_64BIT) += crc32c-pcl-intel-asm_64.o
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crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o
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sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
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sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
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crct10dif-pclmul-y := crct10dif-pcl-asm_64.o crct10dif-pclmul_glue.o
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										151
									
								
								arch/x86/crypto/crct10dif-pclmul_glue.c
									
									
									
									
									
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										151
									
								
								arch/x86/crypto/crct10dif-pclmul_glue.c
									
									
									
									
									
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			@ -0,0 +1,151 @@
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/*
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 * Cryptographic API.
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 *
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 * T10 Data Integrity Field CRC16 Crypto Transform using PCLMULQDQ Instructions
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 *
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 * Copyright (C) 2013 Intel Corporation
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 * Author: Tim Chen <tim.c.chen@linux.intel.com>
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License as published by the Free
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 * Software Foundation; either version 2 of the License, or (at your option)
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 * any later version.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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 * SOFTWARE.
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 *
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 */
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/crc-t10dif.h>
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#include <crypto/internal/hash.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <asm/i387.h>
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#include <asm/cpufeature.h>
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#include <asm/cpu_device_id.h>
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asmlinkage __u16 crc_t10dif_pcl(__u16 crc, const unsigned char *buf,
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				size_t len);
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struct chksum_desc_ctx {
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	__u16 crc;
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};
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/*
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 * Steps through buffer one byte at at time, calculates reflected
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 * crc using table.
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 */
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static int chksum_init(struct shash_desc *desc)
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{
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	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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	ctx->crc = 0;
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	return 0;
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}
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static int chksum_update(struct shash_desc *desc, const u8 *data,
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			 unsigned int length)
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{
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	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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	if (irq_fpu_usable()) {
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		kernel_fpu_begin();
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		ctx->crc = crc_t10dif_pcl(ctx->crc, data, length);
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		kernel_fpu_end();
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	} else
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		ctx->crc = crc_t10dif_generic(ctx->crc, data, length);
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	return 0;
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}
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static int chksum_final(struct shash_desc *desc, u8 *out)
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{
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	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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	*(__u16 *)out = ctx->crc;
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	return 0;
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}
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static int __chksum_finup(__u16 *crcp, const u8 *data, unsigned int len,
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			u8 *out)
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{
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	if (irq_fpu_usable()) {
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		kernel_fpu_begin();
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		*(__u16 *)out = crc_t10dif_pcl(*crcp, data, len);
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		kernel_fpu_end();
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	} else
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		*(__u16 *)out = crc_t10dif_generic(*crcp, data, len);
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	return 0;
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}
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static int chksum_finup(struct shash_desc *desc, const u8 *data,
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			unsigned int len, u8 *out)
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{
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	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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	return __chksum_finup(&ctx->crc, data, len, out);
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}
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static int chksum_digest(struct shash_desc *desc, const u8 *data,
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			 unsigned int length, u8 *out)
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{
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	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
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	return __chksum_finup(&ctx->crc, data, length, out);
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}
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static struct shash_alg alg = {
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	.digestsize		=	CRC_T10DIF_DIGEST_SIZE,
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	.init		=	chksum_init,
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	.update		=	chksum_update,
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	.final		=	chksum_final,
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	.finup		=	chksum_finup,
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	.digest		=	chksum_digest,
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	.descsize		=	sizeof(struct chksum_desc_ctx),
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	.base			=	{
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		.cra_name		=	"crct10dif",
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		.cra_driver_name	=	"crct10dif-pclmul",
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		.cra_priority		=	200,
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		.cra_blocksize		=	CRC_T10DIF_BLOCK_SIZE,
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		.cra_module		=	THIS_MODULE,
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	}
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};
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static const struct x86_cpu_id crct10dif_cpu_id[] = {
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	X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
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	{}
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};
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MODULE_DEVICE_TABLE(x86cpu, crct10dif_cpu_id);
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static int __init crct10dif_intel_mod_init(void)
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{
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	if (!x86_match_cpu(crct10dif_cpu_id))
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		return -ENODEV;
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	return crypto_register_shash(&alg);
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}
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static void __exit crct10dif_intel_mod_fini(void)
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{
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	crypto_unregister_shash(&alg);
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}
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module_init(crct10dif_intel_mod_init);
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module_exit(crct10dif_intel_mod_fini);
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MODULE_AUTHOR("Tim Chen <tim.c.chen@linux.intel.com>");
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MODULE_DESCRIPTION("T10 DIF CRC calculation accelerated with PCLMULQDQ.");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("crct10dif");
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MODULE_ALIAS("crct10dif-pclmul");
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			@ -384,6 +384,17 @@ config CRYPTO_CRCT10DIF
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	  a crypto transform.  This allows for faster crc t10 diff
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	  transforms to be used if they are available.
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config CRYPTO_CRCT10DIF_PCLMUL
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	tristate "CRCT10DIF PCLMULQDQ hardware acceleration"
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	depends on X86 && 64BIT && CRC_T10DIF
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	select CRYPTO_HASH
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	help
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	  For x86_64 processors with SSE4.2 and PCLMULQDQ supported,
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	  CRC T10 DIF PCLMULQDQ computation can be hardware
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	  accelerated PCLMULQDQ instruction. This option will create
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	  'crct10dif-plcmul' module, which is faster when computing the
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	  crct10dif checksum as compared with the generic table implementation.
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config CRYPTO_GHASH
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	tristate "GHASH digest algorithm"
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	select CRYPTO_GF128MUL
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