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powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache

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On POWER platforms where only some groups of threads within a core
share the L2-cache (indicated by the ibm,thread-groups device-tree
property), we currently print the incorrect shared_cpu_map/list for
L2-cache in the sysfs.

This patch reports the correct shared_cpu_map/list on such platforms.

Example:
On a platform with "ibm,thread-groups" set to
                 00000001 00000002 00000004 00000000
                 00000002 00000004 00000006 00000001
                 00000003 00000005 00000007 00000002
                 00000002 00000004 00000000 00000002
                 00000004 00000006 00000001 00000003
                 00000005 00000007

This indicates that threads {0,2,4,6} in the core share the L2-cache
and threads {1,3,5,7} in the core share the L2 cache.

However, without the patch, the shared_cpu_map/list for L2 for CPUs 0,
1 is reported in the sysfs as follows:

/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0-7
/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,000000ff

/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:0-7
/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000ff

With the patch, the shared_cpu_map/list for L2 cache for CPUs 0, 1 is
correctly reported as follows:

/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0,2,4,6
/sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,00000055

/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:1,3,5,7
/sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000aa

This patch also defines cpu_l2_cache_mask() for !CONFIG_SMP case.

Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1607596739-32439-6-git-send-email-ego@linux.vnet.ibm.com
This commit is contained in:
Gautham R. Shenoy 2020-12-10 16:08:59 +05:30 committed by Michael Ellerman
parent 9538abee18
commit 0be47634db
2 changed files with 24 additions and 10 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

4
arch/powerpc/include/asm/smp.h
View file

@ -201,6 +201,10 @@ static inline const struct cpumask *cpu_smallcore_mask(int cpu)
return cpumask_of(cpu);
}
static inline const struct cpumask *cpu_l2_cache_mask(int cpu)
{
return cpumask_of(cpu);
}
#endif /* CONFIG_SMP */
#ifdef CONFIG_PPC64

30
arch/powerpc/kernel/cacheinfo.c
View file

@ -655,11 +655,27 @@ static unsigned int index_dir_to_cpu(struct cache_index_dir *index)
* On big-core systems, each core has two groups of CPUs each of which
* has its own L1-cache. The thread-siblings which share l1-cache with
* @cpu can be obtained via cpu_smallcore_mask().
*
* On some big-core systems, the L2 cache is shared only between some
* groups of siblings. This is already parsed and encoded in
* cpu_l2_cache_mask().
*
* TODO: cache_lookup_or_instantiate() needs to be made aware of the
* "ibm,thread-groups" property so that cache->shared_cpu_map
* reflects the correct siblings on platforms that have this
* device-tree property. This helper function is only a stop-gap
* solution so that we report the correct siblings to the
* userspace via sysfs.
*/
static const struct cpumask *get_big_core_shared_cpu_map(int cpu, struct cache *cache)
static const struct cpumask *get_shared_cpu_map(struct cache_index_dir *index, struct cache *cache)
{
if (cache->level == 1)
return cpu_smallcore_mask(cpu);
if (has_big_cores) {
int cpu = index_dir_to_cpu(index);
if (cache->level == 1)
return cpu_smallcore_mask(cpu);
if (cache->level == 2 && thread_group_shares_l2)
return cpu_l2_cache_mask(cpu);
}
return &cache->shared_cpu_map;
}
@ -670,17 +686,11 @@ show_shared_cpumap(struct kobject *k, struct kobj_attribute *attr, char *buf, bo
struct cache_index_dir *index;
struct cache *cache;
const struct cpumask *mask;
int cpu;
index = kobj_to_cache_index_dir(k);
cache = index->cache;
if (has_big_cores) {
cpu = index_dir_to_cpu(index);
mask = get_big_core_shared_cpu_map(cpu, cache);
} else {
mask = &cache->shared_cpu_map;
}
mask = get_shared_cpu_map(index, cache);
return cpumap_print_to_pagebuf(list, buf, mask);
}