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	drm/amdgpu: add [en/dis]able_kgq() functions
To replace the IP specific variants which are largely duplicate. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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					 2 changed files with 70 additions and 0 deletions
				
			
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			@ -519,6 +519,39 @@ int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev, int xcc_id)
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	return r;
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}
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int amdgpu_gfx_disable_kgq(struct amdgpu_device *adev, int xcc_id)
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{
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	struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
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	struct amdgpu_ring *kiq_ring = &kiq->ring;
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	int i, r = 0;
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	int j;
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	if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
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		return -EINVAL;
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	spin_lock(&kiq->ring_lock);
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	if (amdgpu_gfx_is_master_xcc(adev, xcc_id)) {
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		if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size *
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						adev->gfx.num_gfx_rings)) {
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			spin_unlock(&kiq->ring_lock);
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			return -ENOMEM;
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		}
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		for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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			j = i + xcc_id * adev->gfx.num_gfx_rings;
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			kiq->pmf->kiq_unmap_queues(kiq_ring,
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						   &adev->gfx.gfx_ring[i],
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						   PREEMPT_QUEUES, 0, 0);
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		}
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	}
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	if (adev->gfx.kiq[0].ring.sched.ready && !adev->job_hang)
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		r = amdgpu_ring_test_helper(kiq_ring);
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	spin_unlock(&kiq->ring_lock);
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	return r;
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}
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int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
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					int queue_bit)
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{
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			@ -590,6 +623,41 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
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	return r;
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}
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int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
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{
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	struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
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	struct amdgpu_ring *kiq_ring = &kiq->ring;
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	int r, i, j;
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	if (!kiq->pmf || !kiq->pmf->kiq_map_queues)
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		return -EINVAL;
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	spin_lock(&kiq->ring_lock);
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	/* No need to map kcq on the slave */
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	if (amdgpu_gfx_is_master_xcc(adev, xcc_id)) {
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		r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
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						adev->gfx.num_gfx_rings);
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		if (r) {
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			DRM_ERROR("Failed to lock KIQ (%d).\n", r);
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			spin_unlock(&adev->gfx.kiq[0].ring_lock);
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			return r;
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		}
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		for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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			j = i + xcc_id * adev->gfx.num_gfx_rings;
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			kiq->pmf->kiq_map_queues(kiq_ring,
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						 &adev->gfx.gfx_ring[i]);
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		}
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	}
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	r = amdgpu_ring_test_helper(kiq_ring);
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	spin_unlock(&kiq->ring_lock);
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	if (r)
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		DRM_ERROR("KCQ enable failed\n");
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	return r;
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}
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/* amdgpu_gfx_off_ctrl - Handle gfx off feature enable/disable
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 *
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 * @adev: amdgpu_device pointer
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			@ -433,6 +433,8 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
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void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev, int xcc_id);
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int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev, int xcc_id);
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int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id);
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int amdgpu_gfx_disable_kgq(struct amdgpu_device *adev, int xcc_id);
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int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id);
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void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev);
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void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev);
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