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	clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init
The current code to initialize, register and read the clocksource is already factored out in mmio.c via the clocksource_mmio_init function. The only difference is the readl vs readl_relaxed. Factor out the code with the clocksource_mmio_init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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					 1 changed files with 2 additions and 14 deletions
				
			
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					@ -152,13 +152,6 @@ static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id)
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	return IRQ_HANDLED;
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						return IRQ_HANDLED;
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}
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					}
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static cycle_t sun5i_clksrc_read(struct clocksource *clksrc)
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{
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	struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc);
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	return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1));
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}
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static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
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					static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
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				unsigned long event, void *data)
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									unsigned long event, void *data)
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{
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					{
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					@ -217,13 +210,8 @@ static int __init sun5i_setup_clocksource(struct device_node *node,
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	writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
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						writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
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	       base + TIMER_CTL_REG(1));
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						       base + TIMER_CTL_REG(1));
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	cs->clksrc.name = node->name;
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						ret = clocksource_mmio_init(base + TIMER_CNTVAL_LO_REG(1), node->name,
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	cs->clksrc.rating = 340;
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									    rate, 340, 32, clocksource_mmio_readl_down);
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	cs->clksrc.read = sun5i_clksrc_read;
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	cs->clksrc.mask = CLOCKSOURCE_MASK(32);
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	cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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	ret = clocksource_register_hz(&cs->clksrc, rate);
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	if (ret) {
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						if (ret) {
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		pr_err("Couldn't register clock source.\n");
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							pr_err("Couldn't register clock source.\n");
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		goto err_remove_notifier;
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							goto err_remove_notifier;
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