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MIPS: RB532: GPIO register offsets are relative to GPIOBASE

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This patch fixes the wrong use of GPIO register offsets
in devices.c. To avoid further problems, use gpio_get_value
to return the NAND status instead of our own expanded code.

Also define the zero offset of the alternate function register to allow
consistent access.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Florian Fainelli 2008-10-31 14:24:29 +01:00 committed by Ralf Baechle
parent 9e86786a4b
commit 1b432840d0
2 changed files with 9 additions and 7 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

14
arch/mips/include/asm/mach-rc32434/rb.h
View file

@ -40,12 +40,14 @@
#define BTCS 0x010040 #define BTCS 0x010040
#define BTCOMPARE 0x010044 #define BTCOMPARE 0x010044
#define GPIOBASE 0x050000 #define GPIOBASE 0x050000
#define GPIOCFG 0x050004 /* Offsets relative to GPIOBASE */
#define GPIOD 0x050008 #define GPIOFUNC 0x00
#define GPIOILEVEL 0x05000C #define GPIOCFG 0x04
#define GPIOISTAT 0x050010 #define GPIOD 0x08
#define GPIONMIEN 0x050014 #define GPIOILEVEL 0x0C
#define IMASK6 0x038038 #define GPIOISTAT 0x10
#define GPIONMIEN 0x14
#define IMASK6 0x38
#define LO_WPX (1 << 0) #define LO_WPX (1 << 0)
#define LO_ALE (1 << 1) #define LO_ALE (1 << 1)
#define LO_CLE (1 << 2) #define LO_CLE (1 << 2)

2
arch/mips/rb532/devices.c
View file

@ -118,7 +118,7 @@ static struct platform_device cf_slot0 = {
/* Resources and device for NAND */ /* Resources and device for NAND */
static int rb532_dev_ready(struct mtd_info *mtd) static int rb532_dev_ready(struct mtd_info *mtd)
{ {
return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY; return gpio_get_value(GPIO_RDY);
} }
static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)