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drm/radeon: Use the drm suballocation manager implementation.
Use the generic suballocation helper for radeon. v3: - Select the suballoc helper in Kconfig (Thomas). Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230224095152.30134-4-thomas.hellstrom@linux.intel.com
This commit is contained in:
Maarten Lankhorst
Thomas Hellström
parent
c103a23f2f
commit
254986e324
6 changed files with 59 additions and 358 deletions
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@ -8,6 +8,7 @@ config DRM_RADEON
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select DRM_DISPLAY_DP_HELPER
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select DRM_DISPLAY_HELPER
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select DRM_KMS_HELPER
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select DRM_SUBALLOC_HELPER
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select DRM_TTM
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select DRM_TTM_HELPER
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select SND_HDA_COMPONENT if SND_HDA_CORE
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@ -79,6 +79,7 @@
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#include <drm/drm_gem.h>
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#include <drm/drm_audio_component.h>
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#include <drm/drm_suballoc.h>
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#include "radeon_family.h"
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#include "radeon_mode.h"
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@ -511,52 +512,12 @@ struct radeon_bo {
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};
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#define gem_to_radeon_bo(gobj) container_of((gobj), struct radeon_bo, tbo.base)
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/* sub-allocation manager, it has to be protected by another lock.
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* By conception this is an helper for other part of the driver
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* like the indirect buffer or semaphore, which both have their
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* locking.
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*
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* Principe is simple, we keep a list of sub allocation in offset
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* order (first entry has offset == 0, last entry has the highest
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* offset).
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*
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* When allocating new object we first check if there is room at
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* the end total_size - (last_object_offset + last_object_size) >=
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* alloc_size. If so we allocate new object there.
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*
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* When there is not enough room at the end, we start waiting for
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* each sub object until we reach object_offset+object_size >=
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* alloc_size, this object then become the sub object we return.
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*
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* Alignment can't be bigger than page size.
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*
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* Hole are not considered for allocation to keep things simple.
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* Assumption is that there won't be hole (all object on same
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* alignment).
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*/
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struct radeon_sa_manager {
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wait_queue_head_t wq;
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struct drm_suballoc_manager base;
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struct radeon_bo *bo;
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struct list_head *hole;
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struct list_head flist[RADEON_NUM_RINGS];
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struct list_head olist;
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unsigned size;
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uint64_t gpu_addr;
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void *cpu_ptr;
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uint32_t domain;
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uint32_t align;
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};
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struct radeon_sa_bo;
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/* sub-allocation buffer */
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struct radeon_sa_bo {
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struct list_head olist;
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struct list_head flist;
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struct radeon_sa_manager *manager;
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unsigned soffset;
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unsigned eoffset;
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struct radeon_fence *fence;
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u32 domain;
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};
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/*
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@ -587,7 +548,7 @@ int radeon_mode_dumb_mmap(struct drm_file *filp,
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* Semaphores.
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*/
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struct radeon_semaphore {
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struct radeon_sa_bo *sa_bo;
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struct drm_suballoc *sa_bo;
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signed waiters;
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uint64_t gpu_addr;
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};
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@ -816,7 +777,7 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask);
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*/
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struct radeon_ib {
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struct radeon_sa_bo *sa_bo;
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struct drm_suballoc *sa_bo;
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uint32_t length_dw;
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uint64_t gpu_addr;
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uint32_t *ptr;
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@ -61,7 +61,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
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{
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int r;
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r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256);
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r = radeon_sa_bo_new(&rdev->ring_tmp_bo, &ib->sa_bo, size, 256);
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if (r) {
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dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
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return r;
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@ -77,7 +77,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
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/* ib pool is bound at RADEON_VA_IB_OFFSET in virtual address
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* space and soffset is the offset inside the pool bo
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*/
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ib->gpu_addr = ib->sa_bo->soffset + RADEON_VA_IB_OFFSET;
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ib->gpu_addr = drm_suballoc_soffset(ib->sa_bo) + RADEON_VA_IB_OFFSET;
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} else {
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ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
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}
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@ -97,7 +97,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
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void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)
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{
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radeon_sync_free(rdev, &ib->sync, ib->fence);
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radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence);
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radeon_sa_bo_free(&ib->sa_bo, ib->fence);
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radeon_fence_unref(&ib->fence);
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}
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@ -201,8 +201,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
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if (rdev->family >= CHIP_BONAIRE) {
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r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
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RADEON_IB_POOL_SIZE*64*1024,
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RADEON_GPU_PAGE_SIZE,
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RADEON_IB_POOL_SIZE*64*1024, 256,
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RADEON_GEM_DOMAIN_GTT,
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RADEON_GEM_GTT_WC);
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} else {
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@ -210,8 +209,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
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* to the command stream checking
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*/
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r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
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RADEON_IB_POOL_SIZE*64*1024,
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RADEON_GPU_PAGE_SIZE,
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RADEON_IB_POOL_SIZE*64*1024, 256,
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RADEON_GEM_DOMAIN_GTT, 0);
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}
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if (r) {
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@ -169,15 +169,22 @@ extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
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/*
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* sub allocation
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*/
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static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
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static inline struct radeon_sa_manager *
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to_radeon_sa_manager(struct drm_suballoc_manager *manager)
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{
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return sa_bo->manager->gpu_addr + sa_bo->soffset;
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return container_of(manager, struct radeon_sa_manager, base);
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}
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static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
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static inline uint64_t radeon_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
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{
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return sa_bo->manager->cpu_ptr + sa_bo->soffset;
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return to_radeon_sa_manager(sa_bo->manager)->gpu_addr +
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drm_suballoc_soffset(sa_bo);
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}
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static inline void *radeon_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
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{
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return to_radeon_sa_manager(sa_bo->manager)->cpu_ptr +
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drm_suballoc_soffset(sa_bo);
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}
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extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
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@ -190,12 +197,10 @@ extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager);
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extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager);
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extern int radeon_sa_bo_new(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager,
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struct radeon_sa_bo **sa_bo,
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unsigned size, unsigned align);
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extern void radeon_sa_bo_free(struct radeon_device *rdev,
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struct radeon_sa_bo **sa_bo,
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extern int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager,
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struct drm_suballoc **sa_bo,
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unsigned int size, unsigned int align);
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extern void radeon_sa_bo_free(struct drm_suballoc **sa_bo,
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struct radeon_fence *fence);
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#if defined(CONFIG_DEBUG_FS)
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extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
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@ -44,53 +44,32 @@
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#include "radeon.h"
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static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);
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static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);
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int radeon_sa_bo_manager_init(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager,
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unsigned size, u32 align, u32 domain, u32 flags)
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unsigned int size, u32 sa_align, u32 domain,
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u32 flags)
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{
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int i, r;
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int r;
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init_waitqueue_head(&sa_manager->wq);
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sa_manager->bo = NULL;
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sa_manager->size = size;
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sa_manager->domain = domain;
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sa_manager->align = align;
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sa_manager->hole = &sa_manager->olist;
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INIT_LIST_HEAD(&sa_manager->olist);
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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INIT_LIST_HEAD(&sa_manager->flist[i]);
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}
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r = radeon_bo_create(rdev, size, align, true,
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r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true,
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domain, flags, NULL, NULL, &sa_manager->bo);
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if (r) {
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dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
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return r;
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}
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sa_manager->domain = domain;
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drm_suballoc_manager_init(&sa_manager->base, size, sa_align);
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return r;
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}
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void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager)
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{
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struct radeon_sa_bo *sa_bo, *tmp;
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if (!list_empty(&sa_manager->olist)) {
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sa_manager->hole = &sa_manager->olist,
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radeon_sa_bo_try_free(sa_manager);
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if (!list_empty(&sa_manager->olist)) {
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dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n");
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}
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}
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list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
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radeon_sa_bo_remove_locked(sa_bo);
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}
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drm_suballoc_manager_fini(&sa_manager->base);
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radeon_bo_unref(&sa_manager->bo);
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sa_manager->size = 0;
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}
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int radeon_sa_bo_manager_start(struct radeon_device *rdev,
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@ -139,260 +118,34 @@ int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
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return r;
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}
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static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)
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int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager,
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struct drm_suballoc **sa_bo,
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unsigned int size, unsigned int align)
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{
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struct radeon_sa_manager *sa_manager = sa_bo->manager;
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if (sa_manager->hole == &sa_bo->olist) {
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sa_manager->hole = sa_bo->olist.prev;
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}
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list_del_init(&sa_bo->olist);
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list_del_init(&sa_bo->flist);
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radeon_fence_unref(&sa_bo->fence);
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kfree(sa_bo);
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}
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struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
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GFP_KERNEL, true, align);
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static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)
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{
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struct radeon_sa_bo *sa_bo, *tmp;
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if (sa_manager->hole->next == &sa_manager->olist)
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return;
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sa_bo = list_entry(sa_manager->hole->next, struct radeon_sa_bo, olist);
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list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
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if (sa_bo->fence == NULL || !radeon_fence_signaled(sa_bo->fence)) {
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return;
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}
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radeon_sa_bo_remove_locked(sa_bo);
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}
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}
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static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)
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{
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struct list_head *hole = sa_manager->hole;
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if (hole != &sa_manager->olist) {
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return list_entry(hole, struct radeon_sa_bo, olist)->eoffset;
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}
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return 0;
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}
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static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)
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{
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struct list_head *hole = sa_manager->hole;
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if (hole->next != &sa_manager->olist) {
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return list_entry(hole->next, struct radeon_sa_bo, olist)->soffset;
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}
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return sa_manager->size;
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}
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static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,
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struct radeon_sa_bo *sa_bo,
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unsigned size, unsigned align)
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{
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unsigned soffset, eoffset, wasted;
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soffset = radeon_sa_bo_hole_soffset(sa_manager);
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eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
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wasted = (align - (soffset % align)) % align;
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if ((eoffset - soffset) >= (size + wasted)) {
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soffset += wasted;
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sa_bo->manager = sa_manager;
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sa_bo->soffset = soffset;
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sa_bo->eoffset = soffset + size;
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list_add(&sa_bo->olist, sa_manager->hole);
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INIT_LIST_HEAD(&sa_bo->flist);
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sa_manager->hole = &sa_bo->olist;
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return true;
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}
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return false;
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}
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/**
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* radeon_sa_event - Check if we can stop waiting
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*
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* @sa_manager: pointer to the sa_manager
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* @size: number of bytes we want to allocate
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* @align: alignment we need to match
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*
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* Check if either there is a fence we can wait for or
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* enough free memory to satisfy the allocation directly
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*/
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static bool radeon_sa_event(struct radeon_sa_manager *sa_manager,
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unsigned size, unsigned align)
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{
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unsigned soffset, eoffset, wasted;
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int i;
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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if (!list_empty(&sa_manager->flist[i])) {
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return true;
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}
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}
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soffset = radeon_sa_bo_hole_soffset(sa_manager);
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eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
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wasted = (align - (soffset % align)) % align;
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if ((eoffset - soffset) >= (size + wasted)) {
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return true;
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}
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return false;
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}
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static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,
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struct radeon_fence **fences,
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unsigned *tries)
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{
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struct radeon_sa_bo *best_bo = NULL;
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unsigned i, soffset, best, tmp;
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/* if hole points to the end of the buffer */
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if (sa_manager->hole->next == &sa_manager->olist) {
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/* try again with its beginning */
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sa_manager->hole = &sa_manager->olist;
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return true;
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}
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soffset = radeon_sa_bo_hole_soffset(sa_manager);
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/* to handle wrap around we add sa_manager->size */
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best = sa_manager->size * 2;
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/* go over all fence list and try to find the closest sa_bo
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* of the current last
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*/
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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struct radeon_sa_bo *sa_bo;
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fences[i] = NULL;
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if (list_empty(&sa_manager->flist[i])) {
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continue;
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}
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sa_bo = list_first_entry(&sa_manager->flist[i],
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struct radeon_sa_bo, flist);
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if (!radeon_fence_signaled(sa_bo->fence)) {
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fences[i] = sa_bo->fence;
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continue;
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}
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/* limit the number of tries each ring gets */
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if (tries[i] > 2) {
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continue;
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}
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tmp = sa_bo->soffset;
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if (tmp < soffset) {
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/* wrap around, pretend it's after */
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tmp += sa_manager->size;
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}
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tmp -= soffset;
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if (tmp < best) {
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/* this sa bo is the closest one */
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best = tmp;
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best_bo = sa_bo;
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}
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}
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if (best_bo) {
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++tries[best_bo->fence->ring];
|
||||
sa_manager->hole = best_bo->olist.prev;
|
||||
|
||||
/* we knew that this one is signaled,
|
||||
so it's save to remote it */
|
||||
radeon_sa_bo_remove_locked(best_bo);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
int radeon_sa_bo_new(struct radeon_device *rdev,
|
||||
struct radeon_sa_manager *sa_manager,
|
||||
struct radeon_sa_bo **sa_bo,
|
||||
unsigned size, unsigned align)
|
||||
{
|
||||
struct radeon_fence *fences[RADEON_NUM_RINGS];
|
||||
unsigned tries[RADEON_NUM_RINGS];
|
||||
int i, r;
|
||||
|
||||
BUG_ON(align > sa_manager->align);
|
||||
BUG_ON(size > sa_manager->size);
|
||||
|
||||
*sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
|
||||
if ((*sa_bo) == NULL) {
|
||||
return -ENOMEM;
|
||||
}
|
||||
(*sa_bo)->manager = sa_manager;
|
||||
(*sa_bo)->fence = NULL;
|
||||
INIT_LIST_HEAD(&(*sa_bo)->olist);
|
||||
INIT_LIST_HEAD(&(*sa_bo)->flist);
|
||||
|
||||
spin_lock(&sa_manager->wq.lock);
|
||||
do {
|
||||
for (i = 0; i < RADEON_NUM_RINGS; ++i)
|
||||
tries[i] = 0;
|
||||
|
||||
do {
|
||||
radeon_sa_bo_try_free(sa_manager);
|
||||
|
||||
if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,
|
||||
size, align)) {
|
||||
spin_unlock(&sa_manager->wq.lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* see if we can skip over some allocations */
|
||||
} while (radeon_sa_bo_next_hole(sa_manager, fences, tries));
|
||||
|
||||
for (i = 0; i < RADEON_NUM_RINGS; ++i)
|
||||
radeon_fence_ref(fences[i]);
|
||||
|
||||
spin_unlock(&sa_manager->wq.lock);
|
||||
r = radeon_fence_wait_any(rdev, fences, false);
|
||||
for (i = 0; i < RADEON_NUM_RINGS; ++i)
|
||||
radeon_fence_unref(&fences[i]);
|
||||
spin_lock(&sa_manager->wq.lock);
|
||||
/* if we have nothing to wait for block */
|
||||
if (r == -ENOENT) {
|
||||
r = wait_event_interruptible_locked(
|
||||
sa_manager->wq,
|
||||
radeon_sa_event(sa_manager, size, align)
|
||||
);
|
||||
}
|
||||
|
||||
} while (!r);
|
||||
|
||||
spin_unlock(&sa_manager->wq.lock);
|
||||
kfree(*sa_bo);
|
||||
if (IS_ERR(sa)) {
|
||||
*sa_bo = NULL;
|
||||
return r;
|
||||
return PTR_ERR(sa);
|
||||
}
|
||||
|
||||
void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
|
||||
*sa_bo = sa;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void radeon_sa_bo_free(struct drm_suballoc **sa_bo,
|
||||
struct radeon_fence *fence)
|
||||
{
|
||||
struct radeon_sa_manager *sa_manager;
|
||||
|
||||
if (sa_bo == NULL || *sa_bo == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
sa_manager = (*sa_bo)->manager;
|
||||
spin_lock(&sa_manager->wq.lock);
|
||||
if (fence && !radeon_fence_signaled(fence)) {
|
||||
(*sa_bo)->fence = radeon_fence_ref(fence);
|
||||
list_add_tail(&(*sa_bo)->flist,
|
||||
&sa_manager->flist[fence->ring]);
|
||||
} else {
|
||||
radeon_sa_bo_remove_locked(*sa_bo);
|
||||
}
|
||||
wake_up_all_locked(&sa_manager->wq);
|
||||
spin_unlock(&sa_manager->wq.lock);
|
||||
if (fence)
|
||||
drm_suballoc_free(*sa_bo, &fence->base);
|
||||
else
|
||||
drm_suballoc_free(*sa_bo, NULL);
|
||||
|
||||
*sa_bo = NULL;
|
||||
}
|
||||
|
||||
|
|
@ -400,25 +153,8 @@ void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
|
|||
void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
|
||||
struct seq_file *m)
|
||||
{
|
||||
struct radeon_sa_bo *i;
|
||||
struct drm_printer p = drm_seq_file_printer(m);
|
||||
|
||||
spin_lock(&sa_manager->wq.lock);
|
||||
list_for_each_entry(i, &sa_manager->olist, olist) {
|
||||
uint64_t soffset = i->soffset + sa_manager->gpu_addr;
|
||||
uint64_t eoffset = i->eoffset + sa_manager->gpu_addr;
|
||||
if (&i->olist == sa_manager->hole) {
|
||||
seq_printf(m, ">");
|
||||
} else {
|
||||
seq_printf(m, " ");
|
||||
}
|
||||
seq_printf(m, "[0x%010llx 0x%010llx] size %8lld",
|
||||
soffset, eoffset, eoffset - soffset);
|
||||
if (i->fence) {
|
||||
seq_printf(m, " protected by 0x%016llx on ring %d",
|
||||
i->fence->seq, i->fence->ring);
|
||||
}
|
||||
seq_printf(m, "\n");
|
||||
}
|
||||
spin_unlock(&sa_manager->wq.lock);
|
||||
drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager->gpu_addr);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ int radeon_semaphore_create(struct radeon_device *rdev,
|
|||
if (*semaphore == NULL) {
|
||||
return -ENOMEM;
|
||||
}
|
||||
r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo,
|
||||
r = radeon_sa_bo_new(&rdev->ring_tmp_bo,
|
||||
&(*semaphore)->sa_bo, 8, 8);
|
||||
if (r) {
|
||||
kfree(*semaphore);
|
||||
|
|
@ -100,7 +100,7 @@ void radeon_semaphore_free(struct radeon_device *rdev,
|
|||
dev_err(rdev->dev, "semaphore %p has more waiters than signalers,"
|
||||
" hardware lockup imminent!\n", *semaphore);
|
||||
}
|
||||
radeon_sa_bo_free(rdev, &(*semaphore)->sa_bo, fence);
|
||||
radeon_sa_bo_free(&(*semaphore)->sa_bo, fence);
|
||||
kfree(*semaphore);
|
||||
*semaphore = NULL;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue