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drm/amd/display: Remove double checks for debug.enable_mem_low_power.bits.cm

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[Why]
A variety of the 3DLUT handling functions check
`debug.enable_mem_low_power.bits.cm` both in the caller and function.
This is unnecessary overhead.

[How]
For each of them reduce to just checking just in caller or function.

Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello 2024-12-04 14:27:42 -06:00 committed by Alex Deucher
parent 4321742c39
commit 33056a97ae
1 changed files with 3 additions and 6 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

9
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
View file

@ -790,8 +790,7 @@ static bool dpp3_program_blnd_lut(struct dpp *dpp_base,
if (params == NULL) { if (params == NULL) {
REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_MODE, 0); REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_MODE, 0);
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) dpp3_power_on_blnd_lut(dpp_base, false);
dpp3_power_on_blnd_lut(dpp_base, false);
return false; return false;
} }
@ -1204,8 +1203,7 @@ static bool dpp3_program_shaper(struct dpp *dpp_base,
if (params == NULL) { if (params == NULL) {
REG_SET(CM_SHAPER_CONTROL, 0, CM_SHAPER_LUT_MODE, 0); REG_SET(CM_SHAPER_CONTROL, 0, CM_SHAPER_LUT_MODE, 0);
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) dpp3_power_on_shaper(dpp_base, false);
dpp3_power_on_shaper(dpp_base, false);
return false; return false;
} }
@ -1399,8 +1397,7 @@ static bool dpp3_program_3dlut(struct dpp *dpp_base,
if (params == NULL) { if (params == NULL) {
dpp3_set_3dlut_mode(dpp_base, LUT_BYPASS, false, false); dpp3_set_3dlut_mode(dpp_base, LUT_BYPASS, false, false);
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) dpp3_power_on_hdr3dlut(dpp_base, false);
dpp3_power_on_hdr3dlut(dpp_base, false);
return false; return false;
} }