mirrors/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2025-11-04 02:30:34 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/meson: Add support for HDMI venc modes and settings

Browse source 
This patch adds support for the supported HDMI Venc modes and add the VPP mux
value to switch to ENCP encoder.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit is contained in:
Neil Armstrong 2017-04-04 14:15:26 +02:00
parent 2f4c95dc3d
commit 335e3713af
3 changed files with 1249 additions and 5 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

1245
drivers/gpu/drm/meson/meson_venc.c
View file

File diff suppressed because it is too large Load diff

7
drivers/gpu/drm/meson/meson_venc.h
View file

@ -30,6 +30,7 @@ enum {
MESON_VENC_MODE_NONE = 0, MESON_VENC_MODE_NONE = 0,
MESON_VENC_MODE_CVBS_PAL, MESON_VENC_MODE_CVBS_PAL,
MESON_VENC_MODE_CVBS_NTSC, MESON_VENC_MODE_CVBS_NTSC,
MESON_VENC_MODE_HDMI,
}; };
struct meson_cvbs_enci_mode { struct meson_cvbs_enci_mode {
@ -56,12 +57,18 @@ struct meson_cvbs_enci_mode {
unsigned int analog_sync_adj; unsigned int analog_sync_adj;
}; };
/* HDMI Clock parameters */
bool meson_venc_hdmi_supported_vic(int vic);
bool meson_venc_hdmi_venc_repeat(int vic);
/* CVBS Timings and Parameters */ /* CVBS Timings and Parameters */
extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal; extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal;
extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc; extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc;
void meson_venci_cvbs_mode_set(struct meson_drm *priv, void meson_venci_cvbs_mode_set(struct meson_drm *priv,
struct meson_cvbs_enci_mode *mode); struct meson_cvbs_enci_mode *mode);
void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
struct drm_display_mode *mode);
unsigned int meson_venci_get_field(struct meson_drm *priv); unsigned int meson_venci_get_field(struct meson_drm *priv);
void meson_venc_enable_vsync(struct meson_drm *priv); void meson_venc_enable_vsync(struct meson_drm *priv);

2
drivers/gpu/drm/meson/meson_vpp.h
View file

@ -23,6 +23,8 @@
/* Mux VIU/VPP to ENCI */ /* Mux VIU/VPP to ENCI */
#define MESON_VIU_VPP_MUX_ENCI 0x5 #define MESON_VIU_VPP_MUX_ENCI 0x5
/* Mux VIU/VPP to ENCP */
#define MESON_VIU_VPP_MUX_ENCP 0xA
void meson_vpp_setup_mux(struct meson_drm *priv, unsigned int mux); void meson_vpp_setup_mux(struct meson_drm *priv, unsigned int mux);