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	drm/panfrost: Add AFBC_FEATURES parameter
The value of the AFBC_FEATURES register is required by userspace to determine AFBC support on Bifrost. A user on our IRC channel (#panfrost) reported a workload that raised a fault on one system's Mali G31 but worked flawlessly with another system's Mali G31. We determined the cause to be missing AFBC support on one vendor's Mali implementation -- it turns out AFBC is optional on Bifrost! Whether AFBC is supported or not is exposed in the AFBC_FEATURES register on Bifrost, which reads back as 0 on Midgard. A zero value indicates AFBC is fully supported, provided the architecture itself supports AFBC, allowing backwards-compatibility with Midgard. Bits 0 and 15 indicate that AFBC support is absent for texturing and rendering respectively. The user experiencing the fault reports that AFBC_FEATURES reads back 0x10001 on their system, confirming the architectural lack of AFBC. Userspace needs this parameter to know to disable AFBC on that chip, and perhaps others. v2: Fix typo from copy-paste fail. v3: Bump the UABI version. This commit was cherry-picked from another series so chalking this up to a rebase fail. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Cc: Rob Herring <robh@kernel.org> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210604130011.3203-1-alyssa.rosenzweig@collabora.com
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					 5 changed files with 7 additions and 1 deletions
				
			
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			@ -45,6 +45,7 @@ struct panfrost_features {
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	u32 thread_max_workgroup_sz;
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	u32 thread_max_barrier_sz;
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	u32 coherency_features;
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	u32 afbc_features;
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	u32 texture_features[4];
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	u32 js_features[16];
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			@ -63,6 +63,7 @@ static int panfrost_ioctl_get_param(struct drm_device *ddev, void *data, struct
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		PANFROST_FEATURE(THREAD_MAX_BARRIER_SZ,
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				thread_max_barrier_sz);
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		PANFROST_FEATURE(COHERENCY_FEATURES, coherency_features);
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		PANFROST_FEATURE(AFBC_FEATURES, afbc_features);
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		PANFROST_FEATURE_ARRAY(TEXTURE_FEATURES, texture_features, 3);
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		PANFROST_FEATURE_ARRAY(JS_FEATURES, js_features, 15);
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		PANFROST_FEATURE(NR_CORE_GROUPS, nr_core_groups);
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			@ -547,6 +548,7 @@ DEFINE_DRM_GEM_FOPS(panfrost_drm_driver_fops);
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 * Panfrost driver version:
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 * - 1.0 - initial interface
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 * - 1.1 - adds HEAP and NOEXEC flags for CREATE_BO
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 * - 1.2 - adds AFBC_FEATURES query
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 */
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static const struct drm_driver panfrost_drm_driver = {
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	.driver_features	= DRIVER_RENDER | DRIVER_GEM | DRIVER_SYNCOBJ,
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			@ -559,7 +561,7 @@ static const struct drm_driver panfrost_drm_driver = {
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	.desc			= "panfrost DRM",
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	.date			= "20180908",
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	.major			= 1,
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	.minor			= 1,
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	.minor			= 2,
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	.gem_create_object	= panfrost_gem_create_object,
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	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
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			@ -228,6 +228,7 @@ static void panfrost_gpu_init_features(struct panfrost_device *pfdev)
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	pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
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	pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE);
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	pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES);
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	pfdev->features.afbc_features = gpu_read(pfdev, GPU_AFBC_FEATURES);
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	for (i = 0; i < 4; i++)
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		pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i));
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			@ -82,6 +82,7 @@
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#define GPU_TEXTURE_FEATURES(n)		(0x0B0 + ((n) * 4))
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#define GPU_JS_FEATURES(n)		(0x0C0 + ((n) * 4))
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#define GPU_AFBC_FEATURES		(0x4C)	/* (RO) AFBC support on Bifrost */
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#define GPU_SHADER_PRESENT_LO		0x100	/* (RO) Shader core present bitmap, low word */
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#define GPU_SHADER_PRESENT_HI		0x104	/* (RO) Shader core present bitmap, high word */
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			@ -171,6 +171,7 @@ enum drm_panfrost_param {
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	DRM_PANFROST_PARAM_JS_FEATURES15,
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	DRM_PANFROST_PARAM_NR_CORE_GROUPS,
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	DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,
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	DRM_PANFROST_PARAM_AFBC_FEATURES,
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};
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struct drm_panfrost_get_param {
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