drm/amdgpu: fix fence fallback timer expired error

IH is not working after switching a new gpu index for the first time.

During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
may not work.The access could be blocked by nBIF protection as VF isn't in
exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
so that QEMU reprograms MSIX table.

call amdgpu_restore_msix on resume to restore msix table.

Signed-off-by: Samuel Zhang <guoqing.zhang@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Samuel Zhang 2025-05-08 14:36:35 +08:00 committed by Alex Deucher
parent 2f405eb45c
commit 4108c2be12
3 changed files with 9 additions and 1 deletions

View file

@ -5109,6 +5109,13 @@ static inline int amdgpu_virt_resume(struct amdgpu_device *adev)
int r;
unsigned int prev_physical_node_id = adev->gmc.xgmi.physical_node_id;
/* During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
* may not work. The access could be blocked by nBIF protection as VF isn't in
* exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
* so that QEMU reprograms MSIX table.
*/
amdgpu_restore_msix(adev);
r = adev->gfxhub.funcs->get_xgmi_info(adev);
if (r)
return r;

View file

@ -242,7 +242,7 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
return true;
}
static void amdgpu_restore_msix(struct amdgpu_device *adev)
void amdgpu_restore_msix(struct amdgpu_device *adev)
{
u16 ctrl;

View file

@ -146,5 +146,6 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev);
int amdgpu_irq_add_domain(struct amdgpu_device *adev);
void amdgpu_irq_remove_domain(struct amdgpu_device *adev);
unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id);
void amdgpu_restore_msix(struct amdgpu_device *adev);
#endif