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drm/amdgpu: fix fence fallback timer expired error
IH is not working after switching a new gpu index for the first time. During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO) may not work.The access could be blocked by nBIF protection as VF isn't in exclusive access mode. Exclusive access is enabled now, disable/enable MSIX so that QEMU reprograms MSIX table. call amdgpu_restore_msix on resume to restore msix table. Signed-off-by: Samuel Zhang <guoqing.zhang@amd.com> Acked-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 9 additions and 1 deletions
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@ -5109,6 +5109,13 @@ static inline int amdgpu_virt_resume(struct amdgpu_device *adev)
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int r;
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unsigned int prev_physical_node_id = adev->gmc.xgmi.physical_node_id;
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/* During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
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* may not work. The access could be blocked by nBIF protection as VF isn't in
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* exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
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* so that QEMU reprograms MSIX table.
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*/
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amdgpu_restore_msix(adev);
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r = adev->gfxhub.funcs->get_xgmi_info(adev);
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if (r)
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return r;
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@ -242,7 +242,7 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
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return true;
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}
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static void amdgpu_restore_msix(struct amdgpu_device *adev)
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void amdgpu_restore_msix(struct amdgpu_device *adev)
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{
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u16 ctrl;
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@ -146,5 +146,6 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev);
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int amdgpu_irq_add_domain(struct amdgpu_device *adev);
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void amdgpu_irq_remove_domain(struct amdgpu_device *adev);
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unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id);
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void amdgpu_restore_msix(struct amdgpu_device *adev);
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#endif
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