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MIPS: uaccess: Remove get_fs/set_fs call sites
Use new helpers to access user/kernel for functions, which are used with user/kernel pointers. Instead of dealing with get_fs/set_fs select user/kernel access via parameter. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Christoph Hellwig <hch@lst.de>
This commit is contained in:
Thomas Bogendoerfer
parent
08ee3a009f
commit
45deb5faeb
3 changed files with 136 additions and 186 deletions
18
arch/mips/kernel/access-helper.h
Normal file
18
arch/mips/kernel/access-helper.h
Normal file
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@ -0,0 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/uaccess.h>
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static inline int __get_addr(unsigned long *a, unsigned long *p, bool user)
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{
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return user ? get_user(*a, p) : get_kernel_nofault(*a, p);
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}
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static inline int __get_inst16(u16 *i, u16 *p, bool user)
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{
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return user ? get_user(*i, p) : get_kernel_nofault(*i, p);
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}
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static inline int __get_inst32(u32 *i, u32 *p, bool user)
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{
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return user ? get_user(*i, p) : get_kernel_nofault(*i, p);
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}
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@ -72,6 +72,8 @@
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#include <asm/mach-loongson64/cpucfg-emul.h>
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#include "access-helper.h"
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extern void check_wait(void);
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extern asmlinkage void rollback_handle_int(void);
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extern asmlinkage void handle_int(void);
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@ -108,7 +110,8 @@ void (*board_bind_eic_interrupt)(int irq, int regset);
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void (*board_ebase_setup)(void);
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void(*board_cache_error_setup)(void);
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static void show_raw_backtrace(unsigned long reg29, const char *loglvl)
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static void show_raw_backtrace(unsigned long reg29, const char *loglvl,
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bool user)
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{
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unsigned long *sp = (unsigned long *)(reg29 & ~3);
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unsigned long addr;
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@ -118,9 +121,7 @@ static void show_raw_backtrace(unsigned long reg29, const char *loglvl)
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printk("%s\n", loglvl);
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#endif
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while (!kstack_end(sp)) {
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unsigned long __user *p =
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(unsigned long __user *)(unsigned long)sp++;
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if (__get_user(addr, p)) {
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if (__get_addr(&addr, sp++, user)) {
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printk("%s (Bad stack address)", loglvl);
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break;
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}
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@ -141,7 +142,7 @@ __setup("raw_show_trace", set_raw_show_trace);
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#endif
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static void show_backtrace(struct task_struct *task, const struct pt_regs *regs,
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const char *loglvl)
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const char *loglvl, bool user)
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{
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unsigned long sp = regs->regs[29];
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unsigned long ra = regs->regs[31];
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@ -151,7 +152,7 @@ static void show_backtrace(struct task_struct *task, const struct pt_regs *regs,
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task = current;
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if (raw_show_trace || user_mode(regs) || !__kernel_text_address(pc)) {
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show_raw_backtrace(sp, loglvl);
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show_raw_backtrace(sp, loglvl, user);
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return;
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}
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printk("%sCall Trace:\n", loglvl);
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@ -167,12 +168,12 @@ static void show_backtrace(struct task_struct *task, const struct pt_regs *regs,
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* with at least a bit of error checking ...
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*/
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static void show_stacktrace(struct task_struct *task,
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const struct pt_regs *regs, const char *loglvl)
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const struct pt_regs *regs, const char *loglvl, bool user)
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{
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const int field = 2 * sizeof(unsigned long);
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long stackdata;
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unsigned long stackdata;
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int i;
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unsigned long __user *sp = (unsigned long __user *)regs->regs[29];
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unsigned long *sp = (unsigned long *)regs->regs[29];
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printk("%sStack :", loglvl);
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i = 0;
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@ -186,7 +187,7 @@ static void show_stacktrace(struct task_struct *task,
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break;
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}
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if (__get_user(stackdata, sp++)) {
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if (__get_addr(&stackdata, sp++, user)) {
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pr_cont(" (Bad stack address)");
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break;
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}
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@ -195,13 +196,12 @@ static void show_stacktrace(struct task_struct *task,
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i++;
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}
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pr_cont("\n");
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show_backtrace(task, regs, loglvl);
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show_backtrace(task, regs, loglvl, user);
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}
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void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
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{
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struct pt_regs regs;
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mm_segment_t old_fs = get_fs();
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regs.cp0_status = KSU_KERNEL;
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if (sp) {
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@ -217,33 +217,41 @@ void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
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prepare_frametrace(®s);
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}
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}
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/*
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* show_stack() deals exclusively with kernel mode, so be sure to access
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* the stack in the kernel (not user) address space.
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*/
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set_fs(KERNEL_DS);
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show_stacktrace(task, ®s, loglvl);
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set_fs(old_fs);
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show_stacktrace(task, ®s, loglvl, false);
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}
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static void show_code(unsigned int __user *pc)
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static void show_code(void *pc, bool user)
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{
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long i;
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unsigned short __user *pc16 = NULL;
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unsigned short *pc16 = NULL;
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printk("Code:");
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if ((unsigned long)pc & 1)
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pc16 = (unsigned short __user *)((unsigned long)pc & ~1);
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pc16 = (u16 *)((unsigned long)pc & ~1);
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for(i = -3 ; i < 6 ; i++) {
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unsigned int insn;
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if (pc16 ? __get_user(insn, pc16 + i) : __get_user(insn, pc + i)) {
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pr_cont(" (Bad address in epc)\n");
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break;
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if (pc16) {
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u16 insn16;
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if (__get_inst16(&insn16, pc16 + i, user))
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goto bad_address;
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pr_cont("%c%04x%c", (i?' ':'<'), insn16, (i?' ':'>'));
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} else {
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u32 insn32;
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if (__get_inst32(&insn32, (u32 *)pc + i, user))
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goto bad_address;
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pr_cont("%c%08x%c", (i?' ':'<'), insn32, (i?' ':'>'));
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}
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pr_cont("%c%0*x%c", (i?' ':'<'), pc16 ? 4 : 8, insn, (i?' ':'>'));
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}
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pr_cont("\n");
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return;
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bad_address:
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pr_cont(" (Bad address in epc)\n\n");
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}
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static void __show_regs(const struct pt_regs *regs)
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@ -356,7 +364,6 @@ void show_regs(struct pt_regs *regs)
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void show_registers(struct pt_regs *regs)
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{
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const int field = 2 * sizeof(unsigned long);
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mm_segment_t old_fs = get_fs();
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__show_regs(regs);
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print_modules();
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@ -371,13 +378,9 @@ void show_registers(struct pt_regs *regs)
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printk("*HwTLS: %0*lx\n", field, tls);
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}
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if (!user_mode(regs))
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/* Necessary for getting the correct stack content */
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set_fs(KERNEL_DS);
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show_stacktrace(current, regs, KERN_DEFAULT);
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show_code((unsigned int __user *) regs->cp0_epc);
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show_stacktrace(current, regs, KERN_DEFAULT, user_mode(regs));
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show_code((void *)regs->cp0_epc, user_mode(regs));
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printk("\n");
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set_fs(old_fs);
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}
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static DEFINE_RAW_SPINLOCK(die_lock);
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@ -1022,18 +1025,14 @@ asmlinkage void do_bp(struct pt_regs *regs)
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unsigned long epc = msk_isa16_mode(exception_epc(regs));
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unsigned int opcode, bcode;
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enum ctx_state prev_state;
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mm_segment_t seg;
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seg = get_fs();
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if (!user_mode(regs))
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set_fs(KERNEL_DS);
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bool user = user_mode(regs);
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prev_state = exception_enter();
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current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f;
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if (get_isa16_mode(regs->cp0_epc)) {
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u16 instr[2];
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if (__get_user(instr[0], (u16 __user *)epc))
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if (__get_inst16(&instr[0], (u16 *)epc, user))
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goto out_sigsegv;
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if (!cpu_has_mmips) {
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@ -1044,13 +1043,13 @@ asmlinkage void do_bp(struct pt_regs *regs)
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bcode = instr[0] & 0xf;
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} else {
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/* 32-bit microMIPS BREAK */
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if (__get_user(instr[1], (u16 __user *)(epc + 2)))
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if (__get_inst16(&instr[1], (u16 *)(epc + 2), user))
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goto out_sigsegv;
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opcode = (instr[0] << 16) | instr[1];
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bcode = (opcode >> 6) & ((1 << 20) - 1);
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}
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} else {
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if (__get_user(opcode, (unsigned int __user *)epc))
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if (__get_inst32(&opcode, (u32 *)epc, user))
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goto out_sigsegv;
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bcode = (opcode >> 6) & ((1 << 20) - 1);
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}
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@ -1100,7 +1099,6 @@ asmlinkage void do_bp(struct pt_regs *regs)
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do_trap_or_bp(regs, bcode, TRAP_BRKPT, "Break");
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out:
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set_fs(seg);
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exception_exit(prev_state);
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return;
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@ -1114,25 +1112,21 @@ asmlinkage void do_tr(struct pt_regs *regs)
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u32 opcode, tcode = 0;
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enum ctx_state prev_state;
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u16 instr[2];
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mm_segment_t seg;
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bool user = user_mode(regs);
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unsigned long epc = msk_isa16_mode(exception_epc(regs));
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seg = get_fs();
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if (!user_mode(regs))
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set_fs(KERNEL_DS);
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prev_state = exception_enter();
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current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f;
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if (get_isa16_mode(regs->cp0_epc)) {
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if (__get_user(instr[0], (u16 __user *)(epc + 0)) ||
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__get_user(instr[1], (u16 __user *)(epc + 2)))
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if (__get_inst16(&instr[0], (u16 *)(epc + 0), user) ||
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__get_inst16(&instr[1], (u16 *)(epc + 2), user))
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goto out_sigsegv;
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opcode = (instr[0] << 16) | instr[1];
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/* Immediate versions don't provide a code. */
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if (!(opcode & OPCODE))
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tcode = (opcode >> 12) & ((1 << 4) - 1);
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} else {
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if (__get_user(opcode, (u32 __user *)epc))
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if (__get_inst32(&opcode, (u32 *)epc, user))
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goto out_sigsegv;
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/* Immediate versions don't provide a code. */
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if (!(opcode & OPCODE))
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@ -1142,7 +1136,6 @@ asmlinkage void do_tr(struct pt_regs *regs)
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do_trap_or_bp(regs, tcode, 0, "Trap");
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out:
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set_fs(seg);
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exception_exit(prev_state);
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return;
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@ -1591,7 +1584,6 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
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{
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int multi_match = regs->cp0_status & ST0_TS;
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enum ctx_state prev_state;
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mm_segment_t old_fs = get_fs();
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prev_state = exception_enter();
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show_regs(regs);
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@ -1602,12 +1594,7 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
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dump_tlb_all();
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}
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if (!user_mode(regs))
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set_fs(KERNEL_DS);
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show_code((unsigned int __user *) regs->cp0_epc);
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set_fs(old_fs);
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show_code((void *)regs->cp0_epc, user_mode(regs));
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/*
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* Some chips may have other causes of machine check (e.g. SB1
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@ -93,6 +93,8 @@
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#include <asm/mmu_context.h>
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#include <linux/uaccess.h>
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#include "access-helper.h"
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enum {
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UNALIGNED_ACTION_QUIET,
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UNALIGNED_ACTION_SIGNAL,
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@ -112,9 +114,8 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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unsigned long origpc, orig31, value;
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union mips_instruction insn;
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unsigned int res;
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#ifdef CONFIG_EVA
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mm_segment_t seg;
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#endif
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bool user = user_mode(regs);
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origpc = (unsigned long)pc;
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orig31 = regs->regs[31];
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@ -123,7 +124,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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/*
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* This load never faults.
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*/
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__get_user(insn.word, pc);
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__get_inst32(&insn.word, pc, user);
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switch (insn.i_format.opcode) {
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/*
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@ -163,7 +164,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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if (insn.dsp_format.func == lx_op) {
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switch (insn.dsp_format.op) {
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case lwx_op:
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if (!access_ok(addr, 4))
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if (user && !access_ok(addr, 4))
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goto sigbus;
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LoadW(addr, value, res);
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if (res)
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@ -172,7 +173,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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regs->regs[insn.dsp_format.rd] = value;
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break;
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case lhx_op:
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if (!access_ok(addr, 2))
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if (user && !access_ok(addr, 2))
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goto sigbus;
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LoadHW(addr, value, res);
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if (res)
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@ -191,93 +192,66 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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* memory, so we need to "switch" the address limit to
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* user space, so that address check can work properly.
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*/
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seg = force_uaccess_begin();
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switch (insn.spec3_format.func) {
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case lhe_op:
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if (!access_ok(addr, 2)) {
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force_uaccess_end(seg);
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if (!access_ok(addr, 2))
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goto sigbus;
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}
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LoadHWE(addr, value, res);
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if (res) {
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force_uaccess_end(seg);
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if (res)
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goto fault;
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}
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compute_return_epc(regs);
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regs->regs[insn.spec3_format.rt] = value;
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break;
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case lwe_op:
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if (!access_ok(addr, 4)) {
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force_uaccess_end(seg);
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if (!access_ok(addr, 4))
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goto sigbus;
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}
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LoadWE(addr, value, res);
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if (res) {
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force_uaccess_end(seg);
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if (res)
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goto fault;
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}
|
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compute_return_epc(regs);
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regs->regs[insn.spec3_format.rt] = value;
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break;
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case lhue_op:
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if (!access_ok(addr, 2)) {
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force_uaccess_end(seg);
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if (!access_ok(addr, 2))
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goto sigbus;
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}
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LoadHWUE(addr, value, res);
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if (res) {
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force_uaccess_end(seg);
|
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if (res)
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goto fault;
|
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}
|
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compute_return_epc(regs);
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regs->regs[insn.spec3_format.rt] = value;
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break;
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case she_op:
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if (!access_ok(addr, 2)) {
|
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force_uaccess_end(seg);
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if (!access_ok(addr, 2))
|
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goto sigbus;
|
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}
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compute_return_epc(regs);
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value = regs->regs[insn.spec3_format.rt];
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StoreHWE(addr, value, res);
|
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if (res) {
|
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force_uaccess_end(seg);
|
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if (res)
|
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goto fault;
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}
|
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break;
|
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case swe_op:
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if (!access_ok(addr, 4)) {
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force_uaccess_end(seg);
|
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if (!access_ok(addr, 4))
|
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goto sigbus;
|
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}
|
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compute_return_epc(regs);
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value = regs->regs[insn.spec3_format.rt];
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StoreWE(addr, value, res);
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if (res) {
|
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force_uaccess_end(seg);
|
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if (res)
|
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goto fault;
|
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}
|
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break;
|
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default:
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force_uaccess_end(seg);
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goto sigill;
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}
|
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force_uaccess_end(seg);
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}
|
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#endif
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break;
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case lh_op:
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if (!access_ok(addr, 2))
|
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if (user && !access_ok(addr, 2))
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goto sigbus;
|
||||
|
||||
if (IS_ENABLED(CONFIG_EVA)) {
|
||||
if (uaccess_kernel())
|
||||
LoadHW(addr, value, res);
|
||||
else
|
||||
LoadHWE(addr, value, res);
|
||||
} else {
|
||||
if (IS_ENABLED(CONFIG_EVA) && user)
|
||||
LoadHWE(addr, value, res);
|
||||
else
|
||||
LoadHW(addr, value, res);
|
||||
}
|
||||
|
||||
if (res)
|
||||
goto fault;
|
||||
|
|
@ -286,17 +260,13 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
break;
|
||||
|
||||
case lw_op:
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
if (IS_ENABLED(CONFIG_EVA)) {
|
||||
if (uaccess_kernel())
|
||||
LoadW(addr, value, res);
|
||||
else
|
||||
LoadWE(addr, value, res);
|
||||
} else {
|
||||
if (IS_ENABLED(CONFIG_EVA) && user)
|
||||
LoadWE(addr, value, res);
|
||||
else
|
||||
LoadW(addr, value, res);
|
||||
}
|
||||
|
||||
if (res)
|
||||
goto fault;
|
||||
|
|
@ -305,17 +275,13 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
break;
|
||||
|
||||
case lhu_op:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
if (IS_ENABLED(CONFIG_EVA)) {
|
||||
if (uaccess_kernel())
|
||||
LoadHWU(addr, value, res);
|
||||
else
|
||||
LoadHWUE(addr, value, res);
|
||||
} else {
|
||||
if (IS_ENABLED(CONFIG_EVA) && user)
|
||||
LoadHWUE(addr, value, res);
|
||||
else
|
||||
LoadHWU(addr, value, res);
|
||||
}
|
||||
|
||||
if (res)
|
||||
goto fault;
|
||||
|
|
@ -332,7 +298,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
LoadWU(addr, value, res);
|
||||
|
|
@ -355,7 +321,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
LoadDW(addr, value, res);
|
||||
|
|
@ -370,40 +336,32 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
goto sigill;
|
||||
|
||||
case sh_op:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
compute_return_epc(regs);
|
||||
value = regs->regs[insn.i_format.rt];
|
||||
|
||||
if (IS_ENABLED(CONFIG_EVA)) {
|
||||
if (uaccess_kernel())
|
||||
StoreHW(addr, value, res);
|
||||
else
|
||||
StoreHWE(addr, value, res);
|
||||
} else {
|
||||
if (IS_ENABLED(CONFIG_EVA) && user)
|
||||
StoreHWE(addr, value, res);
|
||||
else
|
||||
StoreHW(addr, value, res);
|
||||
}
|
||||
|
||||
if (res)
|
||||
goto fault;
|
||||
break;
|
||||
|
||||
case sw_op:
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
compute_return_epc(regs);
|
||||
value = regs->regs[insn.i_format.rt];
|
||||
|
||||
if (IS_ENABLED(CONFIG_EVA)) {
|
||||
if (uaccess_kernel())
|
||||
StoreW(addr, value, res);
|
||||
else
|
||||
StoreWE(addr, value, res);
|
||||
} else {
|
||||
if (IS_ENABLED(CONFIG_EVA) && user)
|
||||
StoreWE(addr, value, res);
|
||||
else
|
||||
StoreW(addr, value, res);
|
||||
}
|
||||
|
||||
if (res)
|
||||
goto fault;
|
||||
|
|
@ -418,7 +376,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
compute_return_epc(regs);
|
||||
|
|
@ -626,6 +584,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
unsigned long origpc, contpc;
|
||||
union mips_instruction insn;
|
||||
struct mm_decoded_insn mminsn;
|
||||
bool user = user_mode(regs);
|
||||
|
||||
origpc = regs->cp0_epc;
|
||||
orig31 = regs->regs[31];
|
||||
|
|
@ -689,7 +648,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if (reg == 31)
|
||||
goto sigbus;
|
||||
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
LoadW(addr, value, res);
|
||||
|
|
@ -708,7 +667,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if (reg == 31)
|
||||
goto sigbus;
|
||||
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
value = regs->regs[reg];
|
||||
|
|
@ -728,7 +687,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if (reg == 31)
|
||||
goto sigbus;
|
||||
|
||||
if (!access_ok(addr, 16))
|
||||
if (user && !access_ok(addr, 16))
|
||||
goto sigbus;
|
||||
|
||||
LoadDW(addr, value, res);
|
||||
|
|
@ -751,7 +710,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if (reg == 31)
|
||||
goto sigbus;
|
||||
|
||||
if (!access_ok(addr, 16))
|
||||
if (user && !access_ok(addr, 16))
|
||||
goto sigbus;
|
||||
|
||||
value = regs->regs[reg];
|
||||
|
|
@ -774,10 +733,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if ((rvar > 9) || !reg)
|
||||
goto sigill;
|
||||
if (reg & 0x10) {
|
||||
if (!access_ok(addr, 4 * (rvar + 1)))
|
||||
if (user && !access_ok(addr, 4 * (rvar + 1)))
|
||||
goto sigbus;
|
||||
} else {
|
||||
if (!access_ok(addr, 4 * rvar))
|
||||
if (user && !access_ok(addr, 4 * rvar))
|
||||
goto sigbus;
|
||||
}
|
||||
if (rvar == 9)
|
||||
|
|
@ -810,10 +769,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if ((rvar > 9) || !reg)
|
||||
goto sigill;
|
||||
if (reg & 0x10) {
|
||||
if (!access_ok(addr, 4 * (rvar + 1)))
|
||||
if (user && !access_ok(addr, 4 * (rvar + 1)))
|
||||
goto sigbus;
|
||||
} else {
|
||||
if (!access_ok(addr, 4 * rvar))
|
||||
if (user && !access_ok(addr, 4 * rvar))
|
||||
goto sigbus;
|
||||
}
|
||||
if (rvar == 9)
|
||||
|
|
@ -847,10 +806,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if ((rvar > 9) || !reg)
|
||||
goto sigill;
|
||||
if (reg & 0x10) {
|
||||
if (!access_ok(addr, 8 * (rvar + 1)))
|
||||
if (user && !access_ok(addr, 8 * (rvar + 1)))
|
||||
goto sigbus;
|
||||
} else {
|
||||
if (!access_ok(addr, 8 * rvar))
|
||||
if (user && !access_ok(addr, 8 * rvar))
|
||||
goto sigbus;
|
||||
}
|
||||
if (rvar == 9)
|
||||
|
|
@ -888,10 +847,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
if ((rvar > 9) || !reg)
|
||||
goto sigill;
|
||||
if (reg & 0x10) {
|
||||
if (!access_ok(addr, 8 * (rvar + 1)))
|
||||
if (user && !access_ok(addr, 8 * (rvar + 1)))
|
||||
goto sigbus;
|
||||
} else {
|
||||
if (!access_ok(addr, 8 * rvar))
|
||||
if (user && !access_ok(addr, 8 * rvar))
|
||||
goto sigbus;
|
||||
}
|
||||
if (rvar == 9)
|
||||
|
|
@ -1010,7 +969,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
case mm_lwm16_op:
|
||||
reg = insn.mm16_m_format.rlist;
|
||||
rvar = reg + 1;
|
||||
if (!access_ok(addr, 4 * rvar))
|
||||
if (user && !access_ok(addr, 4 * rvar))
|
||||
goto sigbus;
|
||||
|
||||
for (i = 16; rvar; rvar--, i++) {
|
||||
|
|
@ -1030,7 +989,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
case mm_swm16_op:
|
||||
reg = insn.mm16_m_format.rlist;
|
||||
rvar = reg + 1;
|
||||
if (!access_ok(addr, 4 * rvar))
|
||||
if (user && !access_ok(addr, 4 * rvar))
|
||||
goto sigbus;
|
||||
|
||||
for (i = 16; rvar; rvar--, i++) {
|
||||
|
|
@ -1084,7 +1043,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
}
|
||||
|
||||
loadHW:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
LoadHW(addr, value, res);
|
||||
|
|
@ -1094,7 +1053,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
goto success;
|
||||
|
||||
loadHWU:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
LoadHWU(addr, value, res);
|
||||
|
|
@ -1104,7 +1063,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
goto success;
|
||||
|
||||
loadW:
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
LoadW(addr, value, res);
|
||||
|
|
@ -1122,7 +1081,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
LoadWU(addr, value, res);
|
||||
|
|
@ -1144,7 +1103,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
LoadDW(addr, value, res);
|
||||
|
|
@ -1158,7 +1117,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
goto sigill;
|
||||
|
||||
storeHW:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
value = regs->regs[reg];
|
||||
|
|
@ -1168,7 +1127,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
goto success;
|
||||
|
||||
storeW:
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
value = regs->regs[reg];
|
||||
|
|
@ -1186,7 +1145,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
value = regs->regs[reg];
|
||||
|
|
@ -1243,6 +1202,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
union mips16e_instruction mips16inst, oldinst;
|
||||
unsigned int opcode;
|
||||
int extended = 0;
|
||||
bool user = user_mode(regs);
|
||||
|
||||
origpc = regs->cp0_epc;
|
||||
orig31 = regs->regs[31];
|
||||
|
|
@ -1344,7 +1304,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
goto sigbus;
|
||||
|
||||
case MIPS16e_lh_op:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
LoadHW(addr, value, res);
|
||||
|
|
@ -1355,7 +1315,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
break;
|
||||
|
||||
case MIPS16e_lhu_op:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
LoadHWU(addr, value, res);
|
||||
|
|
@ -1368,7 +1328,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
case MIPS16e_lw_op:
|
||||
case MIPS16e_lwpc_op:
|
||||
case MIPS16e_lwsp_op:
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
LoadW(addr, value, res);
|
||||
|
|
@ -1387,7 +1347,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
LoadWU(addr, value, res);
|
||||
|
|
@ -1411,7 +1371,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
LoadDW(addr, value, res);
|
||||
|
|
@ -1426,7 +1386,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
goto sigill;
|
||||
|
||||
case MIPS16e_sh_op:
|
||||
if (!access_ok(addr, 2))
|
||||
if (user && !access_ok(addr, 2))
|
||||
goto sigbus;
|
||||
|
||||
MIPS16e_compute_return_epc(regs, &oldinst);
|
||||
|
|
@ -1439,7 +1399,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
case MIPS16e_sw_op:
|
||||
case MIPS16e_swsp_op:
|
||||
case MIPS16e_i8_op: /* actually - MIPS16e_swrasp_func */
|
||||
if (!access_ok(addr, 4))
|
||||
if (user && !access_ok(addr, 4))
|
||||
goto sigbus;
|
||||
|
||||
MIPS16e_compute_return_epc(regs, &oldinst);
|
||||
|
|
@ -1459,7 +1419,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
|
|||
* would blow up, so for now we don't handle unaligned 64-bit
|
||||
* instructions on 32-bit kernels.
|
||||
*/
|
||||
if (!access_ok(addr, 8))
|
||||
if (user && !access_ok(addr, 8))
|
||||
goto sigbus;
|
||||
|
||||
MIPS16e_compute_return_epc(regs, &oldinst);
|
||||
|
|
@ -1516,7 +1476,6 @@ asmlinkage void do_ade(struct pt_regs *regs)
|
|||
{
|
||||
enum ctx_state prev_state;
|
||||
unsigned int __user *pc;
|
||||
mm_segment_t seg;
|
||||
|
||||
prev_state = exception_enter();
|
||||
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,
|
||||
|
|
@ -1551,24 +1510,14 @@ asmlinkage void do_ade(struct pt_regs *regs)
|
|||
show_registers(regs);
|
||||
|
||||
if (cpu_has_mmips) {
|
||||
seg = get_fs();
|
||||
if (!user_mode(regs))
|
||||
set_fs(KERNEL_DS);
|
||||
emulate_load_store_microMIPS(regs,
|
||||
(void __user *)regs->cp0_badvaddr);
|
||||
set_fs(seg);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
if (cpu_has_mips16) {
|
||||
seg = get_fs();
|
||||
if (!user_mode(regs))
|
||||
set_fs(KERNEL_DS);
|
||||
emulate_load_store_MIPS16e(regs,
|
||||
(void __user *)regs->cp0_badvaddr);
|
||||
set_fs(seg);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -1579,11 +1528,7 @@ asmlinkage void do_ade(struct pt_regs *regs)
|
|||
show_registers(regs);
|
||||
pc = (unsigned int __user *)exception_epc(regs);
|
||||
|
||||
seg = get_fs();
|
||||
if (!user_mode(regs))
|
||||
set_fs(KERNEL_DS);
|
||||
emulate_load_store_insn(regs, (void __user *)regs->cp0_badvaddr, pc);
|
||||
set_fs(seg);
|
||||
|
||||
return;
|
||||
|
||||
|
|
|
|||
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Reference in a new issue