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ahci: imx: Add imx53 SATA temperature sensor support
Add a hwmon entry to get the temperature from the die of imx53 SATA. The original patch was made by Richard Zhu for kernel 2.6.x: ENGR00134041-MX53-Add-the-SATA-AHCI-temperature-monitor.patch Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk> Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Csaba Kertesz
Tejun Heo
parent
de2518201e
commit
54643a83b4
1 changed files with 195 additions and 0 deletions
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@ -26,6 +26,9 @@
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/libata.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/thermal.h>
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#include "ahci.h"
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#define DRV_NAME "ahci-imx"
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@ -214,6 +217,180 @@ static int imx_sata_phy_reset(struct ahci_host_priv *hpriv)
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return timeout ? 0 : -ETIMEDOUT;
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}
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enum {
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/* SATA PHY Register */
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SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT = 0x0001,
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SATA_PHY_CR_CLOCK_DAC_CTL = 0x0008,
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SATA_PHY_CR_CLOCK_RTUNE_CTL = 0x0009,
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SATA_PHY_CR_CLOCK_ADC_OUT = 0x000A,
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SATA_PHY_CR_CLOCK_MPLL_TST = 0x0017,
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};
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static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio)
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{
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u16 adc_out_reg, read_sum;
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u32 index, read_attempt;
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const u32 attempt_limit = 100;
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);
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imx_phy_reg_write(rtune_ctl_reg, mmio);
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/* two dummy read */
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index = 0;
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read_attempt = 0;
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adc_out_reg = 0;
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_ADC_OUT, mmio);
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while (index < 2) {
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imx_phy_reg_read(&adc_out_reg, mmio);
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/* check if valid */
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if (adc_out_reg & 0x400)
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index++;
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read_attempt++;
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if (read_attempt > attempt_limit) {
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dev_err(dev, "Read REG more than %d times!\n",
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attempt_limit);
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break;
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}
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}
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index = 0;
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read_attempt = 0;
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read_sum = 0;
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while (index < 80) {
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imx_phy_reg_read(&adc_out_reg, mmio);
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if (adc_out_reg & 0x400) {
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read_sum = read_sum + (adc_out_reg & 0x3FF);
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index++;
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}
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read_attempt++;
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if (read_attempt > attempt_limit) {
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dev_err(dev, "Read REG more than %d times!\n",
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attempt_limit);
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break;
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}
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}
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/* Use the U32 to make 1000 precision */
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return (read_sum * 1000) / 80;
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}
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/* SATA AHCI temperature monitor */
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static int sata_ahci_read_temperature(void *dev, int *temp)
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{
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u16 mpll_test_reg, rtune_ctl_reg, dac_ctl_reg, read_sum;
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u32 str1, str2, str3, str4;
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int m1, m2, a;
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struct ahci_host_priv *hpriv = dev_get_drvdata(dev);
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void __iomem *mmio = hpriv->mmio;
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/* check rd-wr to reg */
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read_sum = 0;
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT, mmio);
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imx_phy_reg_write(read_sum, mmio);
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imx_phy_reg_read(&read_sum, mmio);
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if ((read_sum & 0xffff) != 0)
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dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum);
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imx_phy_reg_write(0x5A5A, mmio);
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imx_phy_reg_read(&read_sum, mmio);
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if ((read_sum & 0xffff) != 0x5A5A)
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dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum);
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imx_phy_reg_write(0x1234, mmio);
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imx_phy_reg_read(&read_sum, mmio);
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if ((read_sum & 0xffff) != 0x1234)
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dev_err(dev, "Read/Write REG error, 0x%x!\n", read_sum);
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/* start temperature test */
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);
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imx_phy_reg_read(&mpll_test_reg, mmio);
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);
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imx_phy_reg_read(&rtune_ctl_reg, mmio);
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);
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imx_phy_reg_read(&dac_ctl_reg, mmio);
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/* mpll_tst.meas_iv ([12:2]) */
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str1 = (mpll_test_reg >> 2) & 0x7FF;
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/* rtune_ctl.mode ([1:0]) */
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str2 = (rtune_ctl_reg) & 0x3;
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/* dac_ctl.dac_mode ([14:12]) */
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str3 = (dac_ctl_reg >> 12) & 0x7;
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/* rtune_ctl.sel_atbp ([4]) */
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str4 = (rtune_ctl_reg >> 4);
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/* Calculate the m1 */
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/* mpll_tst.meas_iv */
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mpll_test_reg = (mpll_test_reg & 0xE03) | (512) << 2;
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/* rtune_ctl.mode */
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rtune_ctl_reg = (rtune_ctl_reg & 0xFFC) | (1);
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/* dac_ctl.dac_mode */
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dac_ctl_reg = (dac_ctl_reg & 0x8FF) | (4) << 12;
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/* rtune_ctl.sel_atbp */
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rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (0) << 4;
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);
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imx_phy_reg_write(mpll_test_reg, mmio);
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);
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imx_phy_reg_write(dac_ctl_reg, mmio);
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m1 = read_adc_sum(dev, rtune_ctl_reg, mmio);
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/* Calculate the m2 */
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/* rtune_ctl.sel_atbp */
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rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (1) << 4;
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m2 = read_adc_sum(dev, rtune_ctl_reg, mmio);
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/* restore the status */
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/* mpll_tst.meas_iv */
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mpll_test_reg = (mpll_test_reg & 0xE03) | (str1) << 2;
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/* rtune_ctl.mode */
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rtune_ctl_reg = (rtune_ctl_reg & 0xFFC) | (str2);
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/* dac_ctl.dac_mode */
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dac_ctl_reg = (dac_ctl_reg & 0x8FF) | (str3) << 12;
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/* rtune_ctl.sel_atbp */
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rtune_ctl_reg = (rtune_ctl_reg & 0xFEF) | (str4) << 4;
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);
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imx_phy_reg_write(mpll_test_reg, mmio);
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);
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imx_phy_reg_write(dac_ctl_reg, mmio);
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imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);
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imx_phy_reg_write(rtune_ctl_reg, mmio);
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/* Compute temperature */
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if (!(m2 / 1000))
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m2 = 1000;
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a = (m2 - m1) / (m2/1000);
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*temp = ((-559) * a * a) / 1000 + (1379) * a + (-458000);
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return 0;
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}
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static ssize_t sata_ahci_show_temp(struct device *dev,
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struct device_attribute *da,
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char *buf)
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{
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unsigned int temp = 0;
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int err;
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err = sata_ahci_read_temperature(dev, &temp);
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if (err < 0)
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return err;
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return sprintf(buf, "%u\n", temp);
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}
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static const struct thermal_zone_of_device_ops fsl_sata_ahci_of_thermal_ops = {
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.get_temp = sata_ahci_read_temperature,
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};
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static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, sata_ahci_show_temp, NULL, 0);
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static struct attribute *fsl_sata_ahci_attrs[] = {
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&sensor_dev_attr_temp1_input.dev_attr.attr,
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NULL
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};
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ATTRIBUTE_GROUPS(fsl_sata_ahci);
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static int imx_sata_enable(struct ahci_host_priv *hpriv)
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{
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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@ -597,6 +774,24 @@ static int imx_ahci_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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if (imxpriv->type == AHCI_IMX53) {
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/* Add the temperature monitor */
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struct device *hwmon_dev;
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hwmon_dev =
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devm_hwmon_device_register_with_groups(dev,
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"sata_ahci",
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hpriv,
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fsl_sata_ahci_groups);
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if (IS_ERR(hwmon_dev)) {
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ret = PTR_ERR(hwmon_dev);
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goto disable_clk;
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}
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devm_thermal_zone_of_sensor_register(hwmon_dev, 0, hwmon_dev,
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&fsl_sata_ahci_of_thermal_ops);
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dev_info(dev, "%s: sensor 'sata_ahci'\n", dev_name(hwmon_dev));
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}
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ret = imx_sata_enable(hpriv);
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if (ret)
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goto disable_clk;
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