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powerpc: Add irqtrace support for 32-bit powerpc
Based on initial work from: Dale Farnsworth <dale@farnsworth.org> Add the low level irq tracing hooks for 32-bit powerpc needed to enable full lockdep functionality. The approach taken to deal with the code in entry_32.S is that we don't trace all the transitions of MSR:EE when we just turn it off to peek at TI_FLAGS without races. Only when we are calling into C code or returning from exceptions with a state that have changed from what lockdep thinks. There's a little bugger though: If we take an exception that keeps interrupts enabled (such as an alignment exception) while interrupts are enabled, we will call trace_hardirqs_on() on the way back spurriously. Not a big deal, but to get rid of it would require remembering in pt_regs that the exception was one of the type that kept interrupts enabled which we don't know at this stage. (Well, we could test all cases for regs->trap but that sucks too much). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
parent
04a85d1234
commit
5d38902c48
4 changed files with 135 additions and 15 deletions
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@ -62,7 +62,6 @@ config HAVE_LATENCYTOP_SUPPORT
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config TRACE_IRQFLAGS_SUPPORT
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bool
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depends on PPC64
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default y
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config LOCKDEP_SUPPORT
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@ -68,13 +68,13 @@ static inline int irqs_disabled_flags(unsigned long flags)
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#if defined(CONFIG_BOOKE)
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#define SET_MSR_EE(x) mtmsr(x)
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#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
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#define raw_local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
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#else
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#define SET_MSR_EE(x) mtmsr(x)
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#define local_irq_restore(flags) mtmsr(flags)
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#define raw_local_irq_restore(flags) mtmsr(flags)
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#endif
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static inline void local_irq_disable(void)
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static inline void raw_local_irq_disable(void)
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{
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#ifdef CONFIG_BOOKE
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__asm__ __volatile__("wrteei 0": : :"memory");
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@ -86,7 +86,7 @@ static inline void local_irq_disable(void)
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#endif
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}
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static inline void local_irq_enable(void)
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static inline void raw_local_irq_enable(void)
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{
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#ifdef CONFIG_BOOKE
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__asm__ __volatile__("wrteei 1": : :"memory");
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@ -98,7 +98,7 @@ static inline void local_irq_enable(void)
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#endif
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}
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static inline void local_irq_save_ptr(unsigned long *flags)
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static inline void raw_local_irq_save_ptr(unsigned long *flags)
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{
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unsigned long msr;
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msr = mfmsr();
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@ -110,12 +110,12 @@ static inline void local_irq_save_ptr(unsigned long *flags)
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#endif
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}
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#define local_save_flags(flags) ((flags) = mfmsr())
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#define local_irq_save(flags) local_irq_save_ptr(&flags)
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#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
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#define raw_local_save_flags(flags) ((flags) = mfmsr())
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#define raw_local_irq_save(flags) raw_local_irq_save_ptr(&flags)
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#define raw_irqs_disabled() ((mfmsr() & MSR_EE) == 0)
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#define raw_irqs_disabled_flags(flags) (((flags) & MSR_EE) == 0)
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#define hard_irq_enable() local_irq_enable()
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#define hard_irq_disable() local_irq_disable()
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#define hard_irq_disable() raw_local_irq_disable()
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static inline int irqs_disabled_flags(unsigned long flags)
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{
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@ -191,11 +191,49 @@ transfer_to_handler_cont:
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mflr r9
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lwz r11,0(r9) /* virtual address of handler */
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lwz r9,4(r9) /* where to go when done */
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#ifdef CONFIG_TRACE_IRQFLAGS
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lis r12,reenable_mmu@h
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ori r12,r12,reenable_mmu@l
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mtspr SPRN_SRR0,r12
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mtspr SPRN_SRR1,r10
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SYNC
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RFI
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reenable_mmu: /* re-enable mmu so we can */
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mfmsr r10
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lwz r12,_MSR(r1)
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xor r10,r10,r12
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andi. r10,r10,MSR_EE /* Did EE change? */
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beq 1f
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/* Save handler and return address into the 2 unused words
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* of the STACK_FRAME_OVERHEAD (sneak sneak sneak). Everything
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* else can be recovered from the pt_regs except r3 which for
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* normal interrupts has been set to pt_regs and for syscalls
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* is an argument, so we temporarily use ORIG_GPR3 to save it
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*/
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stw r9,8(r1)
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stw r11,12(r1)
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stw r3,ORIG_GPR3(r1)
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bl trace_hardirqs_off
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lwz r0,GPR0(r1)
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lwz r3,ORIG_GPR3(r1)
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lwz r4,GPR4(r1)
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lwz r5,GPR5(r1)
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lwz r6,GPR6(r1)
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lwz r7,GPR7(r1)
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lwz r8,GPR8(r1)
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lwz r9,8(r1)
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lwz r11,12(r1)
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1: mtctr r11
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mtlr r9
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bctr /* jump to handler */
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#else /* CONFIG_TRACE_IRQFLAGS */
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mtspr SPRN_SRR0,r11
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mtspr SPRN_SRR1,r10
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mtlr r9
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SYNC
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RFI /* jump to handler, enable MMU */
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#endif /* CONFIG_TRACE_IRQFLAGS */
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#if defined (CONFIG_6xx) || defined(CONFIG_E500)
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4: rlwinm r12,r12,0,~_TLF_NAPPING
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@ -251,6 +289,31 @@ _GLOBAL(DoSyscall)
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#ifdef SHOW_SYSCALLS
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bl do_show_syscall
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#endif /* SHOW_SYSCALLS */
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* Return from syscalls can (and generally will) hard enable
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* interrupts. You aren't supposed to call a syscall with
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* interrupts disabled in the first place. However, to ensure
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* that we get it right vs. lockdep if it happens, we force
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* that hard enable here with appropriate tracing if we see
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* that we have been called with interrupts off
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*/
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mfmsr r11
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andi. r12,r11,MSR_EE
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bne+ 1f
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/* We came in with interrupts disabled, we enable them now */
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bl trace_hardirqs_on
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mfmsr r11
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lwz r0,GPR0(r1)
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lwz r3,GPR3(r1)
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lwz r4,GPR4(r1)
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ori r11,r11,MSR_EE
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lwz r5,GPR5(r1)
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lwz r6,GPR6(r1)
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lwz r7,GPR7(r1)
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lwz r8,GPR8(r1)
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mtmsr r11
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1:
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#endif /* CONFIG_TRACE_IRQFLAGS */
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rlwinm r10,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() */
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lwz r11,TI_FLAGS(r10)
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andi. r11,r11,_TIF_SYSCALL_T_OR_A
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@ -275,6 +338,7 @@ ret_from_syscall:
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rlwinm r12,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() */
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/* disable interrupts so current_thread_info()->flags can't change */
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LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
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/* Note: We don't bother telling lockdep about it */
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SYNC
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MTMSRD(r10)
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lwz r9,TI_FLAGS(r12)
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@ -288,6 +352,19 @@ ret_from_syscall:
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oris r11,r11,0x1000 /* Set SO bit in CR */
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stw r11,_CCR(r1)
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syscall_exit_cont:
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lwz r8,_MSR(r1)
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* If we are going to return from the syscall with interrupts
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* off, we trace that here. It shouldn't happen though but we
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* want to catch the bugger if it does right ?
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*/
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andi. r10,r8,MSR_EE
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bne+ 1f
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stw r3,GPR3(r1)
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bl trace_hardirqs_off
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lwz r3,GPR3(r1)
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1:
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#endif /* CONFIG_TRACE_IRQFLAGS */
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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/* If the process has its own DBCR0 value, load it up. The internal
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debug mode bit tells us that dbcr0 should be loaded. */
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@ -311,7 +388,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
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mtlr r4
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mtcr r5
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lwz r7,_NIP(r1)
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lwz r8,_MSR(r1)
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FIX_SRR1(r8, r0)
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lwz r2,GPR2(r1)
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lwz r1,GPR1(r1)
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@ -394,7 +470,9 @@ syscall_exit_work:
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andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
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beq ret_from_except
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/* Re-enable interrupts */
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/* Re-enable interrupts. There is no need to trace that with
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* lockdep as we are supposed to have IRQs on at this point
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*/
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ori r10,r10,MSR_EE
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SYNC
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MTMSRD(r10)
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@ -705,6 +783,7 @@ ret_from_except:
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/* Hard-disable interrupts so that current_thread_info()->flags
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* can't change between when we test it and when we return
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* from the interrupt. */
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/* Note: We don't bother telling lockdep about it */
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LOAD_MSR_KERNEL(r10,MSR_KERNEL)
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SYNC /* Some chip revs have problems here... */
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MTMSRD(r10) /* disable interrupts */
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@ -744,11 +823,24 @@ resume_kernel:
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beq+ restore
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andi. r0,r3,MSR_EE /* interrupts off? */
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beq restore /* don't schedule if so */
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* Lockdep thinks irqs are enabled, we need to call
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* preempt_schedule_irq with IRQs off, so we inform lockdep
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* now that we -did- turn them off already
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*/
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bl trace_hardirqs_off
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#endif
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1: bl preempt_schedule_irq
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rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
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lwz r3,TI_FLAGS(r9)
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andi. r0,r3,_TIF_NEED_RESCHED
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bne- 1b
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* And now, to properly rebalance the above, we tell lockdep they
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* are being turned back on, which will happen when we return
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*/
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bl trace_hardirqs_on
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#endif
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#else
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resume_kernel:
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#endif /* CONFIG_PREEMPT */
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@ -765,6 +857,28 @@ restore:
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stw r6,icache_44x_need_flush@l(r4)
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1:
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#endif /* CONFIG_44x */
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lwz r9,_MSR(r1)
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* Lockdep doesn't know about the fact that IRQs are temporarily turned
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* off in this assembly code while peeking at TI_FLAGS() and such. However
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* we need to inform it if the exception turned interrupts off, and we
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* are about to trun them back on.
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*
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* The problem here sadly is that we don't know whether the exceptions was
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* one that turned interrupts off or not. So we always tell lockdep about
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* turning them on here when we go back to wherever we came from with EE
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* on, even if that may meen some redudant calls being tracked. Maybe later
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* we could encode what the exception did somewhere or test the exception
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* type in the pt_regs but that sounds overkill
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*/
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andi. r10,r9,MSR_EE
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beq 1f
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bl trace_hardirqs_on
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lwz r9,_MSR(r1)
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1:
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#endif /* CONFIG_TRACE_IRQFLAGS */
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lwz r0,GPR0(r1)
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lwz r2,GPR2(r1)
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REST_4GPRS(3, r1)
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@ -782,7 +896,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
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stwcx. r0,0,r1 /* to clear the reservation */
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#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
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lwz r9,_MSR(r1)
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andi. r10,r9,MSR_RI /* check if this exception occurred */
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beql nonrecoverable /* at a bad place (MSR:RI = 0) */
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@ -805,7 +918,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
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MTMSRD(r10) /* clear the RI bit */
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.globl exc_exit_restart
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exc_exit_restart:
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lwz r9,_MSR(r1)
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lwz r12,_NIP(r1)
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FIX_SRR1(r9,r10)
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mtspr SPRN_SRR0,r12
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@ -1035,11 +1147,18 @@ do_work: /* r10 contains MSR_KERNEL here */
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beq do_user_signal
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do_resched: /* r10 contains MSR_KERNEL here */
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/* Note: We don't need to inform lockdep that we are enabling
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* interrupts here. As far as it knows, they are already enabled
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*/
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ori r10,r10,MSR_EE
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SYNC
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MTMSRD(r10) /* hard-enable interrupts */
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bl schedule
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recheck:
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/* Note: And we don't tell it we are disabling them again
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* neither. Those disable/enable cycles used to peek at
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* TI_FLAGS aren't advertised.
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*/
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LOAD_MSR_KERNEL(r10,MSR_KERNEL)
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SYNC
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MTMSRD(r10) /* disable interrupts */
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@ -119,6 +119,8 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
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*/
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notrace void __init machine_init(unsigned long dt_ptr)
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{
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lockdep_init();
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/* Enable early debugging if any specified (see udbg.h) */
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udbg_early_init();
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