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raid6: Add RISC-V SIMD syndrome and recovery calculations
The assembly is originally based on the ARM NEON and int.uc, but uses RISC-V vector instructions to implement the RAID6 syndrome and recovery calculations. The functions are tested on QEMU running with the option "-icount shift=0": raid6: rvvx1 gen() 1008 MB/s raid6: rvvx2 gen() 1395 MB/s raid6: rvvx4 gen() 1584 MB/s raid6: rvvx8 gen() 1694 MB/s raid6: int64x8 gen() 113 MB/s raid6: int64x4 gen() 116 MB/s raid6: int64x2 gen() 272 MB/s raid6: int64x1 gen() 229 MB/s raid6: using algorithm rvvx8 gen() 1694 MB/s raid6: .... xor() 1000 MB/s, rmw enabled raid6: using rvv recovery algorithm [Charlie: - Fixup vector options] Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Tested-by: Charlie Jenkins <charlie@rivosinc.com> Link: https://lore.kernel.org/r/20250305083707.74218-1-zhangchunyan@iscas.ac.cn Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
This commit is contained in:
Chunyan Zhang
Palmer Dabbelt
parent
a569726988
commit
6093faaf95
6 changed files with 1495 additions and 0 deletions
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@ -108,6 +108,10 @@ extern const struct raid6_calls raid6_vpermxor4;
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extern const struct raid6_calls raid6_vpermxor8;
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extern const struct raid6_calls raid6_lsx;
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extern const struct raid6_calls raid6_lasx;
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extern const struct raid6_calls raid6_rvvx1;
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extern const struct raid6_calls raid6_rvvx2;
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extern const struct raid6_calls raid6_rvvx4;
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extern const struct raid6_calls raid6_rvvx8;
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struct raid6_recov_calls {
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void (*data2)(int, size_t, int, int, void **);
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@ -125,6 +129,7 @@ extern const struct raid6_recov_calls raid6_recov_s390xc;
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extern const struct raid6_recov_calls raid6_recov_neon;
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extern const struct raid6_recov_calls raid6_recov_lsx;
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extern const struct raid6_recov_calls raid6_recov_lasx;
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extern const struct raid6_recov_calls raid6_recov_rvv;
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extern const struct raid6_calls raid6_neonx1;
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extern const struct raid6_calls raid6_neonx2;
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@ -10,6 +10,7 @@ raid6_pq-$(CONFIG_ALTIVEC) += altivec1.o altivec2.o altivec4.o altivec8.o \
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raid6_pq-$(CONFIG_KERNEL_MODE_NEON) += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_neon_inner.o
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raid6_pq-$(CONFIG_S390) += s390vx8.o recov_s390xc.o
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raid6_pq-$(CONFIG_LOONGARCH) += loongarch_simd.o recov_loongarch_simd.o
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raid6_pq-$(CONFIG_RISCV_ISA_V) += rvv.o recov_rvv.o
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hostprogs += mktables
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@ -80,6 +80,12 @@ const struct raid6_calls * const raid6_algos[] = {
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#ifdef CONFIG_CPU_HAS_LSX
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&raid6_lsx,
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#endif
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#endif
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#ifdef CONFIG_RISCV_ISA_V
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&raid6_rvvx1,
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&raid6_rvvx2,
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&raid6_rvvx4,
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&raid6_rvvx8,
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#endif
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&raid6_intx8,
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&raid6_intx4,
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@ -115,6 +121,9 @@ const struct raid6_recov_calls *const raid6_recov_algos[] = {
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#ifdef CONFIG_CPU_HAS_LSX
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&raid6_recov_lsx,
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#endif
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#endif
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#ifdef CONFIG_RISCV_ISA_V
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&raid6_recov_rvv,
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#endif
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&raid6_recov_intx1,
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NULL
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229
lib/raid6/recov_rvv.c
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229
lib/raid6/recov_rvv.c
Normal file
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@ -0,0 +1,229 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2024 Institute of Software, CAS.
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* Author: Chunyan Zhang <zhangchunyan@iscas.ac.cn>
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*/
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#include <asm/simd.h>
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#include <asm/vector.h>
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#include <crypto/internal/simd.h>
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#include <linux/raid/pq.h>
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static int rvv_has_vector(void)
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{
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return has_vector();
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}
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static void __raid6_2data_recov_rvv(int bytes, u8 *p, u8 *q, u8 *dp,
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u8 *dq, const u8 *pbmul,
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const u8 *qmul)
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{
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asm volatile (".option push\n"
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".option arch,+v\n"
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"vsetvli x0, %[avl], e8, m1, ta, ma\n"
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".option pop\n"
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: :
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[avl]"r"(16)
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);
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/*
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* while ( bytes-- ) {
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* uint8_t px, qx, db;
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*
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* px = *p ^ *dp;
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* qx = qmul[*q ^ *dq];
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* *dq++ = db = pbmul[px] ^ qx;
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* *dp++ = db ^ px;
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* p++; q++;
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* }
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*/
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while (bytes) {
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/*
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* v0:px, v1:dp,
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* v2:qx, v3:dq,
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* v4:vx, v5:vy,
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* v6:qm0, v7:qm1,
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* v8:pm0, v9:pm1,
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* v14:p/qm[vx], v15:p/qm[vy]
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*/
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asm volatile (".option push\n"
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".option arch,+v\n"
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"vle8.v v0, (%[px])\n"
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"vle8.v v1, (%[dp])\n"
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"vxor.vv v0, v0, v1\n"
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"vle8.v v2, (%[qx])\n"
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"vle8.v v3, (%[dq])\n"
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"vxor.vv v4, v2, v3\n"
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"vsrl.vi v5, v4, 4\n"
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"vand.vi v4, v4, 0xf\n"
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"vle8.v v6, (%[qm0])\n"
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"vle8.v v7, (%[qm1])\n"
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"vrgather.vv v14, v6, v4\n" /* v14 = qm[vx] */
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"vrgather.vv v15, v7, v5\n" /* v15 = qm[vy] */
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"vxor.vv v2, v14, v15\n" /* v2 = qmul[*q ^ *dq] */
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"vsrl.vi v5, v0, 4\n"
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"vand.vi v4, v0, 0xf\n"
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"vle8.v v8, (%[pm0])\n"
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"vle8.v v9, (%[pm1])\n"
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"vrgather.vv v14, v8, v4\n" /* v14 = pm[vx] */
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"vrgather.vv v15, v9, v5\n" /* v15 = pm[vy] */
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"vxor.vv v4, v14, v15\n" /* v4 = pbmul[px] */
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"vxor.vv v3, v4, v2\n" /* v3 = db = pbmul[px] ^ qx */
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"vxor.vv v1, v3, v0\n" /* v1 = db ^ px; */
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"vse8.v v3, (%[dq])\n"
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"vse8.v v1, (%[dp])\n"
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".option pop\n"
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: :
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[px]"r"(p),
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[dp]"r"(dp),
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[qx]"r"(q),
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[dq]"r"(dq),
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[qm0]"r"(qmul),
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[qm1]"r"(qmul + 16),
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[pm0]"r"(pbmul),
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[pm1]"r"(pbmul + 16)
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:);
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bytes -= 16;
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p += 16;
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q += 16;
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dp += 16;
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dq += 16;
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}
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}
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static void __raid6_datap_recov_rvv(int bytes, u8 *p, u8 *q,
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u8 *dq, const u8 *qmul)
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{
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asm volatile (".option push\n"
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".option arch,+v\n"
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"vsetvli x0, %[avl], e8, m1, ta, ma\n"
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".option pop\n"
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: :
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[avl]"r"(16)
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);
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/*
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* while (bytes--) {
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* *p++ ^= *dq = qmul[*q ^ *dq];
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* q++; dq++;
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* }
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*/
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while (bytes) {
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/*
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* v0:vx, v1:vy,
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* v2:dq, v3:p,
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* v4:qm0, v5:qm1,
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* v10:m[vx], v11:m[vy]
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*/
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asm volatile (".option push\n"
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".option arch,+v\n"
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"vle8.v v0, (%[vx])\n"
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"vle8.v v2, (%[dq])\n"
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"vxor.vv v0, v0, v2\n"
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"vsrl.vi v1, v0, 4\n"
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"vand.vi v0, v0, 0xf\n"
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"vle8.v v4, (%[qm0])\n"
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"vle8.v v5, (%[qm1])\n"
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"vrgather.vv v10, v4, v0\n"
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"vrgather.vv v11, v5, v1\n"
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"vxor.vv v0, v10, v11\n"
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"vle8.v v1, (%[vy])\n"
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"vxor.vv v1, v0, v1\n"
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"vse8.v v0, (%[dq])\n"
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"vse8.v v1, (%[vy])\n"
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".option pop\n"
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: :
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[vx]"r"(q),
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[vy]"r"(p),
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[dq]"r"(dq),
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[qm0]"r"(qmul),
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[qm1]"r"(qmul + 16)
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:);
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bytes -= 16;
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p += 16;
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q += 16;
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dq += 16;
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}
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}
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static void raid6_2data_recov_rvv(int disks, size_t bytes, int faila,
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int failb, void **ptrs)
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{
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u8 *p, *q, *dp, *dq;
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const u8 *pbmul; /* P multiplier table for B data */
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const u8 *qmul; /* Q multiplier table (for both) */
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p = (u8 *)ptrs[disks - 2];
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q = (u8 *)ptrs[disks - 1];
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/*
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* Compute syndrome with zero for the missing data pages
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* Use the dead data pages as temporary storage for
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* delta p and delta q
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*/
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dp = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks - 2] = dp;
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dq = (u8 *)ptrs[failb];
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ptrs[failb] = (void *)raid6_empty_zero_page;
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ptrs[disks - 1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dp;
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ptrs[failb] = dq;
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ptrs[disks - 2] = p;
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ptrs[disks - 1] = q;
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/* Now, pick the proper data tables */
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pbmul = raid6_vgfmul[raid6_gfexi[failb - faila]];
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila] ^
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raid6_gfexp[failb]]];
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kernel_vector_begin();
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__raid6_2data_recov_rvv(bytes, p, q, dp, dq, pbmul, qmul);
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kernel_vector_end();
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}
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static void raid6_datap_recov_rvv(int disks, size_t bytes, int faila,
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void **ptrs)
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{
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u8 *p, *q, *dq;
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const u8 *qmul; /* Q multiplier table */
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p = (u8 *)ptrs[disks - 2];
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q = (u8 *)ptrs[disks - 1];
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/*
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* Compute syndrome with zero for the missing data page
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* Use the dead data page as temporary storage for delta q
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*/
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dq = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks - 1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dq;
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ptrs[disks - 1] = q;
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/* Now, pick the proper data tables */
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila]]];
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kernel_vector_begin();
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__raid6_datap_recov_rvv(bytes, p, q, dq, qmul);
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kernel_vector_end();
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}
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const struct raid6_recov_calls raid6_recov_rvv = {
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.data2 = raid6_2data_recov_rvv,
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.datap = raid6_datap_recov_rvv,
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.valid = rvv_has_vector,
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.name = "rvv",
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.priority = 1,
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};
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1212
lib/raid6/rvv.c
Normal file
1212
lib/raid6/rvv.c
Normal file
File diff suppressed because it is too large
Load diff
39
lib/raid6/rvv.h
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39
lib/raid6/rvv.h
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@ -0,0 +1,39 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2024 Institute of Software, CAS.
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*
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* raid6/rvv.h
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*
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* Definitions for RISC-V RAID-6 code
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*/
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#define RAID6_RVV_WRAPPER(_n) \
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static void raid6_rvv ## _n ## _gen_syndrome(int disks, \
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size_t bytes, void **ptrs) \
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{ \
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void raid6_rvv ## _n ## _gen_syndrome_real(int d, \
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unsigned long b, void **p); \
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kernel_vector_begin(); \
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raid6_rvv ## _n ## _gen_syndrome_real(disks, \
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(unsigned long)bytes, ptrs); \
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kernel_vector_end(); \
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} \
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static void raid6_rvv ## _n ## _xor_syndrome(int disks, \
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int start, int stop, \
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size_t bytes, void **ptrs) \
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{ \
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void raid6_rvv ## _n ## _xor_syndrome_real(int d, \
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int s1, int s2, \
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unsigned long b, void **p); \
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kernel_vector_begin(); \
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raid6_rvv ## _n ## _xor_syndrome_real(disks, \
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start, stop, (unsigned long)bytes, ptrs); \
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kernel_vector_end(); \
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} \
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struct raid6_calls const raid6_rvvx ## _n = { \
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raid6_rvv ## _n ## _gen_syndrome, \
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raid6_rvv ## _n ## _xor_syndrome, \
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rvv_has_vector, \
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"rvvx" #_n, \
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0 \
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}
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