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PCI: rcar: Convert to MSI domains

Browse source 
In anticipation of the removal of the msi_controller structure, convert
the Rcar host controller driver to MSI domains.

We end-up with the usual two domain structure, the top one being a
generic PCI/MSI domain, the bottom one being Rcar-specific and handling
the actual HW interrupt allocation.

Link: https://lore.kernel.org/r/20210330151145.997953-4-maz@kernel.org
Tested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
[lorenzo.pieralisi@arm.com: merged fix https://lore.kernel.org/linux-pci/87y2e2p9wk.wl-maz@kernel.org]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Marc Zyngier 2021-03-30 16:11:34 +01:00 committed by Lorenzo Pieralisi
parent 93cd1bb486
commit 83ed8d4fa6
2 changed files with 178 additions and 192 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

1
drivers/pci/controller/Kconfig
View file

@ -58,7 +58,6 @@ config PCIE_RCAR_HOST
bool "Renesas R-Car PCIe host controller" bool "Renesas R-Car PCIe host controller"
depends on ARCH_RENESAS || COMPILE_TEST depends on ARCH_RENESAS || COMPILE_TEST
depends on PCI_MSI_IRQ_DOMAIN depends on PCI_MSI_IRQ_DOMAIN
select PCI_MSI_ARCH_FALLBACKS
help help
Say Y here if you want PCIe controller support on R-Car SoCs in host Say Y here if you want PCIe controller support on R-Car SoCs in host
mode. mode.

355
drivers/pci/controller/pcie-rcar-host.c
View file

@ -35,17 +35,12 @@
struct rcar_msi { struct rcar_msi {
DECLARE_BITMAP(used, INT_PCI_MSI_NR); DECLARE_BITMAP(used, INT_PCI_MSI_NR);
struct irq_domain *domain; struct irq_domain *domain;
struct msi_controller chip; struct mutex map_lock;
struct mutex lock; spinlock_t mask_lock;
int irq1; int irq1;
int irq2; int irq2;
}; };
static inline struct rcar_msi *to_rcar_msi(struct msi_controller *chip)
{
return container_of(chip, struct rcar_msi, chip);
}
/* Structure representing the PCIe interface */ /* Structure representing the PCIe interface */
struct rcar_pcie_host { struct rcar_pcie_host {
struct rcar_pcie pcie; struct rcar_pcie pcie;
@ -55,6 +50,11 @@ struct rcar_pcie_host {
int (*phy_init_fn)(struct rcar_pcie_host *host); int (*phy_init_fn)(struct rcar_pcie_host *host);
}; };
static struct rcar_pcie_host *msi_to_host(struct rcar_msi *msi)
{
return container_of(msi, struct rcar_pcie_host, msi);
}
static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) static u32 rcar_read_conf(struct rcar_pcie *pcie, int where)
{ {
unsigned int shift = BITS_PER_BYTE * (where & 3); unsigned int shift = BITS_PER_BYTE * (where & 3);
@ -291,8 +291,6 @@ static int rcar_pcie_enable(struct rcar_pcie_host *host)
bridge->sysdata = host; bridge->sysdata = host;
bridge->ops = &rcar_pcie_ops; bridge->ops = &rcar_pcie_ops;
if (IS_ENABLED(CONFIG_PCI_MSI))
bridge->msi = &host->msi.chip;
return pci_host_probe(bridge); return pci_host_probe(bridge);
} }
@ -472,42 +470,6 @@ static int rcar_pcie_phy_init_gen3(struct rcar_pcie_host *host)
return err; return err;
} }
static int rcar_msi_alloc(struct rcar_msi *chip)
{
int msi;
mutex_lock(&chip->lock);
msi = find_first_zero_bit(chip->used, INT_PCI_MSI_NR);
if (msi < INT_PCI_MSI_NR)
set_bit(msi, chip->used);
else
msi = -ENOSPC;
mutex_unlock(&chip->lock);
return msi;
}
static int rcar_msi_alloc_region(struct rcar_msi *chip, int no_irqs)
{
int msi;
mutex_lock(&chip->lock);
msi = bitmap_find_free_region(chip->used, INT_PCI_MSI_NR,
order_base_2(no_irqs));
mutex_unlock(&chip->lock);
return msi;
}
static void rcar_msi_free(struct rcar_msi *chip, unsigned long irq)
{
mutex_lock(&chip->lock);
clear_bit(irq, chip->used);
mutex_unlock(&chip->lock);
}
static irqreturn_t rcar_pcie_msi_irq(int irq, void *data) static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
{ {
struct rcar_pcie_host *host = data; struct rcar_pcie_host *host = data;
@ -526,18 +488,13 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
unsigned int index = find_first_bit(&reg, 32); unsigned int index = find_first_bit(&reg, 32);
unsigned int msi_irq; unsigned int msi_irq;
/* clear the interrupt */ msi_irq = irq_find_mapping(msi->domain->parent, index);
rcar_pci_write_reg(pcie, 1 << index, PCIEMSIFR);
msi_irq = irq_find_mapping(msi->domain, index);
if (msi_irq) { if (msi_irq) {
if (test_bit(index, msi->used))
generic_handle_irq(msi_irq); generic_handle_irq(msi_irq);
else
dev_info(dev, "unhandled MSI\n");
} else { } else {
/* Unknown MSI, just clear it */ /* Unknown MSI, just clear it */
dev_dbg(dev, "unexpected MSI\n"); dev_dbg(dev, "unexpected MSI\n");
rcar_pci_write_reg(pcie, BIT(index), PCIEMSIFR);
} }
/* see if there's any more pending in this vector */ /* see if there's any more pending in this vector */
@ -547,150 +504,169 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static int rcar_msi_setup_irq(struct msi_controller *chip, struct pci_dev *pdev, static void rcar_msi_top_irq_ack(struct irq_data *d)
struct msi_desc *desc)
{ {
struct rcar_msi *msi = to_rcar_msi(chip); irq_chip_ack_parent(d);
struct rcar_pcie_host *host = container_of(chip, struct rcar_pcie_host, }
msi.chip);
struct rcar_pcie *pcie = &host->pcie;
struct msi_msg msg;
unsigned int irq;
int hwirq;
hwirq = rcar_msi_alloc(msi); static void rcar_msi_top_irq_mask(struct irq_data *d)
if (hwirq < 0) {
return hwirq; pci_msi_mask_irq(d);
irq_chip_mask_parent(d);
}
irq = irq_find_mapping(msi->domain, hwirq); static void rcar_msi_top_irq_unmask(struct irq_data *d)
if (!irq) { {
rcar_msi_free(msi, hwirq); pci_msi_unmask_irq(d);
irq_chip_unmask_parent(d);
}
static struct irq_chip rcar_msi_top_chip = {
.name = "PCIe MSI",
.irq_ack = rcar_msi_top_irq_ack,
.irq_mask = rcar_msi_top_irq_mask,
.irq_unmask = rcar_msi_top_irq_unmask,
};
static void rcar_msi_irq_ack(struct irq_data *d)
{
struct rcar_msi *msi = irq_data_get_irq_chip_data(d);
struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
/* clear the interrupt */
rcar_pci_write_reg(pcie, BIT(d->hwirq), PCIEMSIFR);
}
static void rcar_msi_irq_mask(struct irq_data *d)
{
struct rcar_msi *msi = irq_data_get_irq_chip_data(d);
struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
unsigned long flags;
u32 value;
spin_lock_irqsave(&msi->mask_lock, flags);
value = rcar_pci_read_reg(pcie, PCIEMSIIER);
value &= ~BIT(d->hwirq);
rcar_pci_write_reg(pcie, value, PCIEMSIIER);
spin_unlock_irqrestore(&msi->mask_lock, flags);
}
static void rcar_msi_irq_unmask(struct irq_data *d)
{
struct rcar_msi *msi = irq_data_get_irq_chip_data(d);
struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
unsigned long flags;
u32 value;
spin_lock_irqsave(&msi->mask_lock, flags);
value = rcar_pci_read_reg(pcie, PCIEMSIIER);
value |= BIT(d->hwirq);
rcar_pci_write_reg(pcie, value, PCIEMSIIER);
spin_unlock_irqrestore(&msi->mask_lock, flags);
}
static int rcar_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
{
return -EINVAL; return -EINVAL;
} }
irq_set_msi_desc(irq, desc); static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{
struct rcar_msi *msi = irq_data_get_irq_chip_data(data);
struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
msg.address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE;
msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR);
msg.data = hwirq; msg->data = data->hwirq;
pci_write_msi_msg(irq, &msg);
return 0;
} }
static int rcar_msi_setup_irqs(struct msi_controller *chip, static struct irq_chip rcar_msi_bottom_chip = {
struct pci_dev *pdev, int nvec, int type) .name = "Rcar MSI",
.irq_ack = rcar_msi_irq_ack,
.irq_mask = rcar_msi_irq_mask,
.irq_unmask = rcar_msi_irq_unmask,
.irq_set_affinity = rcar_msi_set_affinity,
.irq_compose_msi_msg = rcar_compose_msi_msg,
};
static int rcar_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs, void *args)
{ {
struct rcar_msi *msi = to_rcar_msi(chip); struct rcar_msi *msi = domain->host_data;
struct rcar_pcie_host *host = container_of(chip, struct rcar_pcie_host, unsigned int i;
msi.chip);
struct rcar_pcie *pcie = &host->pcie;
struct msi_desc *desc;
struct msi_msg msg;
unsigned int irq;
int hwirq; int hwirq;
int i;
/* MSI-X interrupts are not supported */ mutex_lock(&msi->map_lock);
if (type == PCI_CAP_ID_MSIX)
return -EINVAL;
WARN_ON(!list_is_singular(&pdev->dev.msi_list)); hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs));
desc = list_entry(pdev->dev.msi_list.next, struct msi_desc, list);
mutex_unlock(&msi->map_lock);
hwirq = rcar_msi_alloc_region(msi, nvec);
if (hwirq < 0) if (hwirq < 0)
return -ENOSPC; return -ENOSPC;
irq = irq_find_mapping(msi->domain, hwirq); for (i = 0; i < nr_irqs; i++)
if (!irq) irq_domain_set_info(domain, virq + i, hwirq + i,
return -ENOSPC; &rcar_msi_bottom_chip, domain->host_data,
handle_edge_irq, NULL, NULL);
for (i = 0; i < nvec; i++) {
/*
* irq_create_mapping() called from rcar_pcie_probe() pre-
* allocates descs, so there is no need to allocate descs here.
* We can therefore assume that if irq_find_mapping() above
* returns non-zero, then the descs are also successfully
* allocated.
*/
if (irq_set_msi_desc_off(irq, i, desc)) {
/* TODO: clear */
return -EINVAL;
}
}
desc->nvec_used = nvec;
desc->msi_attrib.multiple = order_base_2(nvec);
msg.address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE;
msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR);
msg.data = hwirq;
pci_write_msi_msg(irq, &msg);
return 0; return 0;
} }
static void rcar_msi_teardown_irq(struct msi_controller *chip, unsigned int irq) static void rcar_msi_domain_free(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs)
{ {
struct rcar_msi *msi = to_rcar_msi(chip); struct irq_data *d = irq_domain_get_irq_data(domain, virq);
struct irq_data *d = irq_get_irq_data(irq); struct rcar_msi *msi = domain->host_data;
rcar_msi_free(msi, d->hwirq); mutex_lock(&msi->map_lock);
bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs));
mutex_unlock(&msi->map_lock);
} }
static struct irq_chip rcar_msi_irq_chip = { static const struct irq_domain_ops rcar_msi_domain_ops = {
.name = "R-Car PCIe MSI", .alloc = rcar_msi_domain_alloc,
.irq_enable = pci_msi_unmask_irq, .free = rcar_msi_domain_free,
.irq_disable = pci_msi_mask_irq,
.irq_mask = pci_msi_mask_irq,
.irq_unmask = pci_msi_unmask_irq,
}; };
static int rcar_msi_map(struct irq_domain *domain, unsigned int irq, static struct msi_domain_info rcar_msi_info = {
irq_hw_number_t hwirq) .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI),
.chip = &rcar_msi_top_chip,
};
static int rcar_allocate_domains(struct rcar_msi *msi)
{ {
irq_set_chip_and_handler(irq, &rcar_msi_irq_chip, handle_simple_irq); struct rcar_pcie *pcie = &msi_to_host(msi)->pcie;
irq_set_chip_data(irq, domain->host_data); struct fwnode_handle *fwnode = dev_fwnode(pcie->dev);
struct irq_domain *parent;
parent = irq_domain_create_linear(fwnode, INT_PCI_MSI_NR,
&rcar_msi_domain_ops, msi);
if (!parent) {
dev_err(pcie->dev, "failed to create IRQ domain\n");
return -ENOMEM;
}
irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS);
msi->domain = pci_msi_create_irq_domain(fwnode, &rcar_msi_info, parent);
if (!msi->domain) {
dev_err(pcie->dev, "failed to create MSI domain\n");
irq_domain_remove(parent);
return -ENOMEM;
}
return 0; return 0;
} }
static const struct irq_domain_ops msi_domain_ops = { static void rcar_free_domains(struct rcar_msi *msi)
.map = rcar_msi_map,
};
static void rcar_pcie_unmap_msi(struct rcar_pcie_host *host)
{ {
struct rcar_msi *msi = &host->msi; struct irq_domain *parent = msi->domain->parent;
int i, irq;
for (i = 0; i < INT_PCI_MSI_NR; i++) {
irq = irq_find_mapping(msi->domain, i);
if (irq > 0)
irq_dispose_mapping(irq);
}
irq_domain_remove(msi->domain); irq_domain_remove(msi->domain);
} irq_domain_remove(parent);
static void rcar_pcie_hw_enable_msi(struct rcar_pcie_host *host)
{
struct rcar_pcie *pcie = &host->pcie;
struct device *dev = pcie->dev;
struct resource res;
if (WARN_ON(of_address_to_resource(dev->of_node, 0, &res)))
return;
/* setup MSI data target */
rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
/* enable all MSI interrupts */
rcar_pci_write_reg(pcie, 0xffffffff, PCIEMSIIER);
} }
static int rcar_pcie_enable_msi(struct rcar_pcie_host *host) static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
@ -698,29 +674,24 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
struct rcar_pcie *pcie = &host->pcie; struct rcar_pcie *pcie = &host->pcie;
struct device *dev = pcie->dev; struct device *dev = pcie->dev;
struct rcar_msi *msi = &host->msi; struct rcar_msi *msi = &host->msi;
int err, i; struct resource res;
int err;
mutex_init(&msi->lock); mutex_init(&msi->map_lock);
spin_lock_init(&msi->mask_lock);
msi->chip.dev = dev; err = of_address_to_resource(dev->of_node, 0, &res);
msi->chip.setup_irq = rcar_msi_setup_irq; if (err)
msi->chip.setup_irqs = rcar_msi_setup_irqs; return err;
msi->chip.teardown_irq = rcar_msi_teardown_irq;
msi->domain = irq_domain_add_linear(dev->of_node, INT_PCI_MSI_NR, err = rcar_allocate_domains(msi);
&msi_domain_ops, &msi->chip); if (err)
if (!msi->domain) { return err;
dev_err(dev, "failed to create IRQ domain\n");
return -ENOMEM;
}
for (i = 0; i < INT_PCI_MSI_NR; i++)
irq_create_mapping(msi->domain, i);
/* Two irqs are for MSI, but they are also used for non-MSI irqs */ /* Two irqs are for MSI, but they are also used for non-MSI irqs */
err = devm_request_irq(dev, msi->irq1, rcar_pcie_msi_irq, err = devm_request_irq(dev, msi->irq1, rcar_pcie_msi_irq,
IRQF_SHARED | IRQF_NO_THREAD, IRQF_SHARED | IRQF_NO_THREAD,
rcar_msi_irq_chip.name, host); rcar_msi_bottom_chip.name, host);
if (err < 0) { if (err < 0) {
dev_err(dev, "failed to request IRQ: %d\n", err); dev_err(dev, "failed to request IRQ: %d\n", err);
goto err; goto err;
@ -728,19 +699,26 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
err = devm_request_irq(dev, msi->irq2, rcar_pcie_msi_irq, err = devm_request_irq(dev, msi->irq2, rcar_pcie_msi_irq,
IRQF_SHARED | IRQF_NO_THREAD, IRQF_SHARED | IRQF_NO_THREAD,
rcar_msi_irq_chip.name, host); rcar_msi_bottom_chip.name, host);
if (err < 0) { if (err < 0) {
dev_err(dev, "failed to request IRQ: %d\n", err); dev_err(dev, "failed to request IRQ: %d\n", err);
goto err; goto err;
} }
/* setup MSI data target */ /* disable all MSIs */
rcar_pcie_hw_enable_msi(host); rcar_pci_write_reg(pcie, 0, PCIEMSIIER);
/*
* Setup MSI data target using RC base address address, which
* is guaranteed to be in the low 32bit range on any RCar HW.
*/
rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
return 0; return 0;
err: err:
rcar_pcie_unmap_msi(host); rcar_free_domains(msi);
return err; return err;
} }
@ -754,7 +732,7 @@ static void rcar_pcie_teardown_msi(struct rcar_pcie_host *host)
/* Disable address decoding of the MSI interrupt, MSIFE */ /* Disable address decoding of the MSI interrupt, MSIFE */
rcar_pci_write_reg(pcie, 0, PCIEMSIALR); rcar_pci_write_reg(pcie, 0, PCIEMSIALR);
rcar_pcie_unmap_msi(host); rcar_free_domains(&host->msi);
} }
static int rcar_pcie_get_resources(struct rcar_pcie_host *host) static int rcar_pcie_get_resources(struct rcar_pcie_host *host)
@ -1007,8 +985,17 @@ static int __maybe_unused rcar_pcie_resume(struct device *dev)
dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f);
/* Enable MSI */ /* Enable MSI */
if (IS_ENABLED(CONFIG_PCI_MSI)) if (IS_ENABLED(CONFIG_PCI_MSI)) {
rcar_pcie_hw_enable_msi(host); struct resource res;
u32 val;
of_address_to_resource(dev->of_node, 0, &res);
rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR);
rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR);
bitmap_to_arr32(&val, host->msi.used, INT_PCI_MSI_NR);
rcar_pci_write_reg(pcie, val, PCIEMSIIER);
}
rcar_pcie_hw_enable(host); rcar_pcie_hw_enable(host);