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drm/amd/amdgpu: Fix the mes version that support inv_tlbs

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MES pipe0 will do VM invalidation with engine set 5 when assign VMID to a process,
driver will submit inv_tlb package to mes pipe1. It might run into race condition
if both pipes use the same invalidate engine set. From MES version 0x83 it will use
invalidate engine set 6 for pipe1 to fix the issue

Signed-off-by: Shaoyun Liu <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Shaoyun Liu 2025-09-11 12:59:00 -04:00 committed by Alex Deucher
parent 531df041f2
commit 85442bac84
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
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@ -337,7 +337,7 @@ static void gmc_v12_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
int vmid, i; int vmid, i;
if (adev->enable_uni_mes && adev->mes.ring[AMDGPU_MES_SCHED_PIPE].sched.ready && if (adev->enable_uni_mes && adev->mes.ring[AMDGPU_MES_SCHED_PIPE].sched.ready &&
(adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x81) { (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x83) {
struct mes_inv_tlbs_pasid_input input = {0}; struct mes_inv_tlbs_pasid_input input = {0};
input.pasid = pasid; input.pasid = pasid;
input.flush_type = flush_type; input.flush_type = flush_type;