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arm/arm64: KVM: Add PSCI version selection API
Although we've implemented PSCI 0.1, 0.2 and 1.0, we expose either 0.1 or 1.0 to a guest, defaulting to the latest version of the PSCI implementation that is compatible with the requested version. This is no different from doing a firmware upgrade on KVM. But in order to give a chance to hypothetical badly implemented guests that would have a fit by discovering something other than PSCI 0.2, let's provide a new API that allows userspace to pick one particular version of the API. This is implemented as a new class of "firmware" registers, where we expose the PSCI version. This allows the PSCI version to be save/restored as part of a guest migration, and also set to any supported version if the guest requires it. Cc: stable@vger.kernel.org #4.16 Reviewed-by: Christoffer Dall <cdall@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Marc Zyngier
parent
bf9a41377d
commit
85bd0ba1ff
10 changed files with 156 additions and 4 deletions
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@ -1960,6 +1960,9 @@ ARM 32-bit VFP control registers have the following id bit patterns:
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ARM 64-bit FP registers have the following id bit patterns:
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0x4030 0000 0012 0 <regno:12>
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ARM firmware pseudo-registers have the following bit pattern:
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0x4030 0000 0014 <regno:16>
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arm64 registers are mapped using the lower 32 bits. The upper 16 of
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that is the register group type, or coprocessor number:
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@ -1976,6 +1979,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value:
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arm64 system registers have the following id bit patterns:
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0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>
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arm64 firmware pseudo-registers have the following bit pattern:
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0x6030 0000 0014 <regno:16>
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MIPS registers are mapped using the lower 32 bits. The upper 16 of that is
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the register group type:
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@ -2510,7 +2516,8 @@ Possible features:
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and execute guest code when KVM_RUN is called.
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- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
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Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
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- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.
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- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision
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backward compatible with v0.2) for the CPU.
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Depends on KVM_CAP_ARM_PSCI_0_2.
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- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.
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Depends on KVM_CAP_ARM_PMU_V3.
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30
Documentation/virtual/kvm/arm/psci.txt
Normal file
30
Documentation/virtual/kvm/arm/psci.txt
Normal file
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@ -0,0 +1,30 @@
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KVM implements the PSCI (Power State Coordination Interface)
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specification in order to provide services such as CPU on/off, reset
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and power-off to the guest.
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The PSCI specification is regularly updated to provide new features,
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and KVM implements these updates if they make sense from a virtualization
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point of view.
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This means that a guest booted on two different versions of KVM can
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observe two different "firmware" revisions. This could cause issues if
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a given guest is tied to a particular PSCI revision (unlikely), or if
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a migration causes a different PSCI version to be exposed out of the
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blue to an unsuspecting guest.
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In order to remedy this situation, KVM exposes a set of "firmware
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pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
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interface. These registers can be saved/restored by userspace, and set
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to a convenient value if required.
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The following register is defined:
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* KVM_REG_ARM_PSCI_VERSION:
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- Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
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(and thus has already been initialized)
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- Returns the current PSCI version on GET_ONE_REG (defaulting to the
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highest PSCI version implemented by KVM and compatible with v0.2)
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- Allows any PSCI version implemented by KVM and compatible with
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v0.2 to be set with SET_ONE_REG
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- Affects the whole VM (even if the register view is per-vcpu)
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@ -77,6 +77,9 @@ struct kvm_arch {
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/* Interrupt controller */
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struct vgic_dist vgic;
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int max_vcpus;
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/* Mandated version of PSCI */
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u32 psci_version;
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};
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#define KVM_NR_MEM_OBJS 40
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@ -195,6 +195,12 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM_VFP_FPINST 0x1009
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#define KVM_REG_ARM_VFP_FPINST2 0x100A
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/* KVM-as-firmware specific pseudo-registers */
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#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
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#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \
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KVM_REG_ARM_FW | ((r) & 0xffff))
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#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
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/* Device Control API: ARM VGIC */
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#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
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#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
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@ -22,6 +22,7 @@
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <kvm/arm_psci.h>
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#include <asm/cputype.h>
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#include <linux/uaccess.h>
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#include <asm/kvm.h>
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@ -176,6 +177,7 @@ static unsigned long num_core_regs(void)
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unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
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{
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return num_core_regs() + kvm_arm_num_coproc_regs(vcpu)
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+ kvm_arm_get_fw_num_regs(vcpu)
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+ NUM_TIMER_REGS;
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}
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@ -196,6 +198,11 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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uindices++;
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}
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ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
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if (ret)
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return ret;
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uindices += kvm_arm_get_fw_num_regs(vcpu);
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ret = copy_timer_indices(vcpu, uindices);
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if (ret)
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return ret;
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@ -214,6 +221,9 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return get_core_reg(vcpu, reg);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
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return kvm_arm_get_fw_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return get_timer_reg(vcpu, reg);
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@ -230,6 +240,9 @@ int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return set_core_reg(vcpu, reg);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
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return kvm_arm_set_fw_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return set_timer_reg(vcpu, reg);
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@ -75,6 +75,9 @@ struct kvm_arch {
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/* Interrupt controller */
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struct vgic_dist vgic;
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/* Mandated version of PSCI */
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u32 psci_version;
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};
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#define KVM_NR_MEM_OBJS 40
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@ -206,6 +206,12 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
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#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
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/* KVM-as-firmware specific pseudo-registers */
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#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
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#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
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KVM_REG_ARM_FW | ((r) & 0xffff))
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#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
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/* Device Control API: ARM VGIC */
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#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
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#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
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@ -25,6 +25,7 @@
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <kvm/arm_psci.h>
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#include <asm/cputype.h>
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#include <linux/uaccess.h>
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#include <asm/kvm.h>
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@ -205,7 +206,7 @@ static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
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{
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return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
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+ NUM_TIMER_REGS;
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+ kvm_arm_get_fw_num_regs(vcpu) + NUM_TIMER_REGS;
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}
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/**
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@ -225,6 +226,11 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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uindices++;
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}
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ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
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if (ret)
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return ret;
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uindices += kvm_arm_get_fw_num_regs(vcpu);
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ret = copy_timer_indices(vcpu, uindices);
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if (ret)
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return ret;
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@ -243,6 +249,9 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return get_core_reg(vcpu, reg);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
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return kvm_arm_get_fw_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return get_timer_reg(vcpu, reg);
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@ -259,6 +268,9 @@ int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return set_core_reg(vcpu, reg);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
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return kvm_arm_set_fw_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return set_timer_reg(vcpu, reg);
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@ -37,10 +37,15 @@ static inline int kvm_psci_version(struct kvm_vcpu *vcpu, struct kvm *kvm)
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* Our PSCI implementation stays the same across versions from
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* v0.2 onward, only adding the few mandatory functions (such
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* as FEATURES with 1.0) that are required by newer
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* revisions. It is thus safe to return the latest.
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* revisions. It is thus safe to return the latest, unless
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* userspace has instructed us otherwise.
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*/
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if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
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if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) {
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if (vcpu->kvm->arch.psci_version)
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return vcpu->kvm->arch.psci_version;
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return KVM_ARM_PSCI_LATEST;
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}
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return KVM_ARM_PSCI_0_1;
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}
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@ -48,4 +53,11 @@ static inline int kvm_psci_version(struct kvm_vcpu *vcpu, struct kvm *kvm)
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int kvm_hvc_call_handler(struct kvm_vcpu *vcpu);
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struct kvm_one_reg;
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu);
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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#endif /* __KVM_ARM_PSCI_H__ */
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@ -18,6 +18,7 @@
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#include <linux/arm-smccc.h>
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#include <linux/preempt.h>
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#include <linux/kvm_host.h>
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#include <linux/uaccess.h>
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#include <linux/wait.h>
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#include <asm/cputype.h>
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@ -427,3 +428,62 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return 1;
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}
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
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{
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return 1; /* PSCI version */
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}
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices))
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return -EFAULT;
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return 0;
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}
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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val = kvm_psci_version(vcpu, vcpu->kvm);
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if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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return 0;
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}
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return -EINVAL;
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}
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
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void __user *uaddr = (void __user *)(long)reg->addr;
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bool wants_02;
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u64 val;
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if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
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switch (val) {
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case KVM_ARM_PSCI_0_1:
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if (wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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case KVM_ARM_PSCI_0_2:
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case KVM_ARM_PSCI_1_0:
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if (!wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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}
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}
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return -EINVAL;
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}
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