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MIPS: Add DWARF unwinding to assembly
This will allow kdump dumps to work correclty with MIPS and future DWARF unwinding of the stack to give accurate tracebacks. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16990/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Corey Minyard
Ralf Baechle
parent
9fef686863
commit
866b6a89c6
6 changed files with 151 additions and 117 deletions
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@ -299,6 +299,10 @@ ifdef CONFIG_64BIT
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bootvars-y += ADDR_BITS=64
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endif
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# This is required to get dwarf unwinding tables into .debug_frame
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# instead of .eh_frame so we don't discard them.
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KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
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LDFLAGS += -m $(ld-emul)
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ifdef CONFIG_MIPS
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@ -55,6 +55,7 @@
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.type symbol, @function; \
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.ent symbol, 0; \
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symbol: .frame sp, 0, ra; \
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.cfi_startproc; \
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.insn
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/*
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@ -66,12 +67,14 @@ symbol: .frame sp, 0, ra; \
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.type symbol, @function; \
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.ent symbol, 0; \
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symbol: .frame sp, framesize, rpc; \
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.cfi_startproc; \
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.insn
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/*
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* END - mark end of function
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*/
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#define END(function) \
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.cfi_endproc; \
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.end function; \
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.size function, .-function
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@ -19,20 +19,43 @@
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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/* Make the addition of cfi info a little easier. */
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.macro cfi_rel_offset reg offset=0 docfi=0
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.if \docfi
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.cfi_rel_offset \reg, \offset
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.endif
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.endm
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.macro cfi_st reg offset=0 docfi=0
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LONG_S \reg, \offset(sp)
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cfi_rel_offset \reg, \offset, \docfi
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.endm
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.macro cfi_restore reg offset=0 docfi=0
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.if \docfi
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.cfi_restore \reg
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.endif
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.endm
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.macro cfi_ld reg offset=0 docfi=0
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LONG_L \reg, \offset(sp)
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cfi_restore \reg \offset \docfi
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.endm
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#define STATMASK 0x3f
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#else
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#define STATMASK 0x1f
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#endif
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.macro SAVE_AT
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.macro SAVE_AT docfi=0
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.set push
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.set noat
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LONG_S $1, PT_R1(sp)
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cfi_st $1, PT_R1, \docfi
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.set pop
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.endm
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.macro SAVE_TEMP
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.macro SAVE_TEMP docfi=0
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#ifdef CONFIG_CPU_HAS_SMARTMIPS
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mflhxu v1
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LONG_S v1, PT_LO(sp)
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@ -44,20 +67,20 @@
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mfhi v1
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#endif
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#ifdef CONFIG_32BIT
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LONG_S $8, PT_R8(sp)
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LONG_S $9, PT_R9(sp)
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cfi_st $8, PT_R8, \docfi
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cfi_st $9, PT_R9, \docfi
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#endif
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LONG_S $10, PT_R10(sp)
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LONG_S $11, PT_R11(sp)
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LONG_S $12, PT_R12(sp)
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cfi_st $10, PT_R10, \docfi
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cfi_st $11, PT_R11, \docfi
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cfi_st $12, PT_R12, \docfi
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#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
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LONG_S v1, PT_HI(sp)
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mflo v1
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#endif
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LONG_S $13, PT_R13(sp)
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LONG_S $14, PT_R14(sp)
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LONG_S $15, PT_R15(sp)
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LONG_S $24, PT_R24(sp)
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cfi_st $13, PT_R13, \docfi
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cfi_st $14, PT_R14, \docfi
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cfi_st $15, PT_R15, \docfi
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cfi_st $24, PT_R24, \docfi
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#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
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LONG_S v1, PT_LO(sp)
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#endif
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@ -71,16 +94,16 @@
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#endif
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.endm
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.macro SAVE_STATIC
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LONG_S $16, PT_R16(sp)
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LONG_S $17, PT_R17(sp)
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LONG_S $18, PT_R18(sp)
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LONG_S $19, PT_R19(sp)
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LONG_S $20, PT_R20(sp)
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LONG_S $21, PT_R21(sp)
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LONG_S $22, PT_R22(sp)
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LONG_S $23, PT_R23(sp)
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LONG_S $30, PT_R30(sp)
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.macro SAVE_STATIC docfi=0
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cfi_st $16, PT_R16, \docfi
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cfi_st $17, PT_R17, \docfi
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cfi_st $18, PT_R18, \docfi
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cfi_st $19, PT_R19, \docfi
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cfi_st $20, PT_R20, \docfi
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cfi_st $21, PT_R21, \docfi
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cfi_st $22, PT_R22, \docfi
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cfi_st $23, PT_R23, \docfi
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cfi_st $30, PT_R30, \docfi
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.endm
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/*
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@ -168,7 +191,7 @@
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.endm
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#endif
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.macro SAVE_SOME
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.macro SAVE_SOME docfi=0
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.set push
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.set noat
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.set reorder
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@ -203,8 +226,11 @@
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#endif
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.set reorder
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move k0, sp
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.if \docfi
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.cfi_register sp, k0
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.endif
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/* Called from user mode, new stack. */
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get_saved_sp
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get_saved_sp docfi=\docfi tosp=1
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8:
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#ifdef CONFIG_CPU_DADDI_WORKAROUNDS
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.set at=k1
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@ -213,8 +239,12 @@
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#ifdef CONFIG_CPU_DADDI_WORKAROUNDS
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.set noat
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#endif
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LONG_S k0, PT_R29(sp)
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LONG_S $3, PT_R3(sp)
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.if \docfi
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.cfi_def_cfa sp,0
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.endif
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cfi_st k0, PT_R29, \docfi
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cfi_rel_offset sp, PT_R29, \docfi
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cfi_st v1, PT_R3, \docfi
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/*
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* You might think that you don't need to save $0,
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* but the FPU emulator and gdb remote debug stub
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@ -222,23 +252,26 @@
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*/
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LONG_S $0, PT_R0(sp)
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mfc0 v1, CP0_STATUS
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LONG_S $2, PT_R2(sp)
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cfi_st v0, PT_R2, \docfi
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LONG_S v1, PT_STATUS(sp)
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LONG_S $4, PT_R4(sp)
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cfi_st $4, PT_R4, \docfi
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mfc0 v1, CP0_CAUSE
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LONG_S $5, PT_R5(sp)
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cfi_st $5, PT_R5, \docfi
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LONG_S v1, PT_CAUSE(sp)
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LONG_S $6, PT_R6(sp)
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LONG_S ra, PT_R31(sp)
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cfi_st $6, PT_R6, \docfi
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cfi_st ra, PT_R31, \docfi
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MFC0 ra, CP0_EPC
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LONG_S $7, PT_R7(sp)
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cfi_st $7, PT_R7, \docfi
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#ifdef CONFIG_64BIT
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LONG_S $8, PT_R8(sp)
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LONG_S $9, PT_R9(sp)
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cfi_st $8, PT_R8, \docfi
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cfi_st $9, PT_R9, \docfi
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#endif
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LONG_S ra, PT_EPC(sp)
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LONG_S $25, PT_R25(sp)
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LONG_S $28, PT_R28(sp)
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.if \docfi
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.cfi_rel_offset ra, PT_EPC
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.endif
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cfi_st $25, PT_R25, \docfi
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cfi_st $28, PT_R28, \docfi
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/* Set thread_info if we're coming from user mode */
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mfc0 k0, CP0_STATUS
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@ -255,21 +288,21 @@
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.set pop
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.endm
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.macro SAVE_ALL
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SAVE_SOME
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SAVE_AT
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SAVE_TEMP
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SAVE_STATIC
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.macro SAVE_ALL docfi=0
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SAVE_SOME \docfi
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SAVE_AT \docfi
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SAVE_TEMP \docfi
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SAVE_STATIC \docfi
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.endm
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.macro RESTORE_AT
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.macro RESTORE_AT docfi=0
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.set push
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.set noat
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LONG_L $1, PT_R1(sp)
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cfi_ld $1, PT_R1, \docfi
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.set pop
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.endm
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.macro RESTORE_TEMP
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.macro RESTORE_TEMP docfi=0
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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/* Restore the Octeon multiplier state */
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jal octeon_mult_restore
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@ -288,33 +321,37 @@
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mthi $24
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#endif
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#ifdef CONFIG_32BIT
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LONG_L $8, PT_R8(sp)
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LONG_L $9, PT_R9(sp)
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cfi_ld $8, PT_R8, \docfi
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cfi_ld $9, PT_R9, \docfi
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#endif
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LONG_L $10, PT_R10(sp)
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LONG_L $11, PT_R11(sp)
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LONG_L $12, PT_R12(sp)
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LONG_L $13, PT_R13(sp)
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LONG_L $14, PT_R14(sp)
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LONG_L $15, PT_R15(sp)
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LONG_L $24, PT_R24(sp)
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cfi_ld $10, PT_R10, \docfi
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cfi_ld $11, PT_R11, \docfi
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cfi_ld $12, PT_R12, \docfi
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cfi_ld $13, PT_R13, \docfi
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cfi_ld $14, PT_R14, \docfi
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cfi_ld $15, PT_R15, \docfi
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cfi_ld $24, PT_R24, \docfi
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.endm
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.macro RESTORE_STATIC
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LONG_L $16, PT_R16(sp)
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LONG_L $17, PT_R17(sp)
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LONG_L $18, PT_R18(sp)
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LONG_L $19, PT_R19(sp)
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LONG_L $20, PT_R20(sp)
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LONG_L $21, PT_R21(sp)
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LONG_L $22, PT_R22(sp)
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LONG_L $23, PT_R23(sp)
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LONG_L $30, PT_R30(sp)
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.macro RESTORE_STATIC docfi=0
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cfi_ld $16, PT_R16, \docfi
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cfi_ld $17, PT_R17, \docfi
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cfi_ld $18, PT_R18, \docfi
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cfi_ld $19, PT_R19, \docfi
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cfi_ld $20, PT_R20, \docfi
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cfi_ld $21, PT_R21, \docfi
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cfi_ld $22, PT_R22, \docfi
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cfi_ld $23, PT_R23, \docfi
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cfi_ld $30, PT_R30, \docfi
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.endm
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.macro RESTORE_SP docfi=0
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cfi_ld sp, PT_R29, \docfi
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.endm
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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.macro RESTORE_SOME
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.macro RESTORE_SOME docfi=0
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.set push
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.set reorder
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.set noat
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@ -329,30 +366,30 @@
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and v0, v1
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or v0, a0
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mtc0 v0, CP0_STATUS
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LONG_L $31, PT_R31(sp)
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LONG_L $28, PT_R28(sp)
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LONG_L $25, PT_R25(sp)
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LONG_L $7, PT_R7(sp)
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LONG_L $6, PT_R6(sp)
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LONG_L $5, PT_R5(sp)
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LONG_L $4, PT_R4(sp)
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LONG_L $3, PT_R3(sp)
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LONG_L $2, PT_R2(sp)
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cfi_ld $31, PT_R31, \docfi
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cfi_ld $28, PT_R28, \docfi
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cfi_ld $25, PT_R25, \docfi
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cfi_ld $7, PT_R7, \docfi
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cfi_ld $6, PT_R6, \docfi
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cfi_ld $5, PT_R5, \docfi
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cfi_ld $4, PT_R4, \docfi
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cfi_ld $3, PT_R3, \docfi
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cfi_ld $2, PT_R2, \docfi
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.set pop
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.endm
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.macro RESTORE_SP_AND_RET
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.macro RESTORE_SP_AND_RET docfi=0
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.set push
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.set noreorder
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LONG_L k0, PT_EPC(sp)
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LONG_L sp, PT_R29(sp)
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RESTORE_SP \docfi
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jr k0
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rfe
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.set pop
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.endm
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#else
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.macro RESTORE_SOME
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.macro RESTORE_SOME docfi=0
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.set push
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.set reorder
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.set noat
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@ -369,24 +406,24 @@
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mtc0 v0, CP0_STATUS
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LONG_L v1, PT_EPC(sp)
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MTC0 v1, CP0_EPC
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LONG_L $31, PT_R31(sp)
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LONG_L $28, PT_R28(sp)
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LONG_L $25, PT_R25(sp)
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cfi_ld $31, PT_R31, \docfi
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cfi_ld $28, PT_R28, \docfi
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cfi_ld $25, PT_R25, \docfi
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#ifdef CONFIG_64BIT
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LONG_L $8, PT_R8(sp)
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LONG_L $9, PT_R9(sp)
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cfi_ld $8, PT_R8, \docfi
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cfi_ld $9, PT_R9, \docfi
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#endif
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LONG_L $7, PT_R7(sp)
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LONG_L $6, PT_R6(sp)
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LONG_L $5, PT_R5(sp)
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LONG_L $4, PT_R4(sp)
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LONG_L $3, PT_R3(sp)
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LONG_L $2, PT_R2(sp)
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cfi_ld $7, PT_R7, \docfi
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cfi_ld $6, PT_R6, \docfi
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cfi_ld $5, PT_R5, \docfi
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cfi_ld $4, PT_R4, \docfi
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cfi_ld $3, PT_R3, \docfi
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cfi_ld $2, PT_R2, \docfi
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.set pop
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.endm
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.macro RESTORE_SP_AND_RET
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LONG_L sp, PT_R29(sp)
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.macro RESTORE_SP_AND_RET docfi=0
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RESTORE_SP \docfi
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#ifdef CONFIG_CPU_MIPSR6
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eretnc
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#else
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@ -398,16 +435,12 @@
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#endif
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.macro RESTORE_SP
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LONG_L sp, PT_R29(sp)
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.endm
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.macro RESTORE_ALL
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RESTORE_TEMP
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RESTORE_STATIC
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RESTORE_AT
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RESTORE_SOME
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RESTORE_SP
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.macro RESTORE_ALL docfi=0
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RESTORE_TEMP \docfi
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RESTORE_STATIC \docfi
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RESTORE_AT \docfi
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RESTORE_SOME \docfi
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RESTORE_SP \docfi
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.endm
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/*
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@ -150,6 +150,7 @@ LEAF(__r4k_wait)
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.align 5
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BUILD_ROLLBACK_PROLOGUE handle_int
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NESTED(handle_int, PT_SIZE, sp)
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.cfi_signal_frame
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#ifdef CONFIG_TRACE_IRQFLAGS
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/*
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* Check to see if the interrupted code has just disabled
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@ -181,7 +182,7 @@ NESTED(handle_int, PT_SIZE, sp)
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1:
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.set pop
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#endif
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SAVE_ALL
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SAVE_ALL docfi=1
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CLI
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TRACE_IRQS_OFF
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@ -269,8 +270,8 @@ NESTED(except_vec_ejtag_debug, 0, sp)
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*/
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BUILD_ROLLBACK_PROLOGUE except_vec_vi
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NESTED(except_vec_vi, 0, sp)
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SAVE_SOME
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SAVE_AT
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SAVE_SOME docfi=1
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SAVE_AT docfi=1
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.set push
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.set noreorder
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PTR_LA v1, except_vec_vi_handler
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@ -396,6 +397,7 @@ NESTED(except_vec_nmi, 0, sp)
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__FINIT
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||||
NESTED(nmi_handler, PT_SIZE, sp)
|
||||
.cfi_signal_frame
|
||||
.set push
|
||||
.set noat
|
||||
/*
|
||||
|
|
@ -478,6 +480,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
|
|||
.macro __BUILD_HANDLER exception handler clear verbose ext
|
||||
.align 5
|
||||
NESTED(handle_\exception, PT_SIZE, sp)
|
||||
.cfi_signal_frame
|
||||
.set noat
|
||||
SAVE_ALL
|
||||
FEXPORT(handle_\exception\ext)
|
||||
|
|
@ -485,8 +488,8 @@ NESTED(nmi_handler, PT_SIZE, sp)
|
|||
.set at
|
||||
__BUILD_\verbose \exception
|
||||
move a0, sp
|
||||
PTR_LA ra, ret_from_exception
|
||||
j do_\handler
|
||||
jal do_\handler
|
||||
j ret_from_exception
|
||||
END(handle_\exception)
|
||||
.endm
|
||||
|
||||
|
|
|
|||
|
|
@ -12,14 +12,15 @@
|
|||
|
||||
.macro tlb_do_page_fault, write
|
||||
NESTED(tlb_do_page_fault_\write, PT_SIZE, sp)
|
||||
SAVE_ALL
|
||||
.cfi_signal_frame
|
||||
SAVE_ALL docfi=1
|
||||
MFC0 a2, CP0_BADVADDR
|
||||
KMODE
|
||||
move a0, sp
|
||||
REG_S a2, PT_BVADDR(sp)
|
||||
li a1, \write
|
||||
PTR_LA ra, ret_from_exception
|
||||
j do_page_fault
|
||||
jal do_page_fault
|
||||
j ret_from_exception
|
||||
END(tlb_do_page_fault_\write)
|
||||
.endm
|
||||
|
||||
|
|
|
|||
|
|
@ -19,31 +19,21 @@
|
|||
.cfi_sections .debug_frame
|
||||
|
||||
LEAF(__vdso_rt_sigreturn)
|
||||
.cfi_startproc
|
||||
.frame sp, 0, ra
|
||||
.mask 0x00000000, 0
|
||||
.fmask 0x00000000, 0
|
||||
.cfi_signal_frame
|
||||
|
||||
li v0, __NR_rt_sigreturn
|
||||
syscall
|
||||
|
||||
.cfi_endproc
|
||||
END(__vdso_rt_sigreturn)
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_ABI32
|
||||
|
||||
LEAF(__vdso_sigreturn)
|
||||
.cfi_startproc
|
||||
.frame sp, 0, ra
|
||||
.mask 0x00000000, 0
|
||||
.fmask 0x00000000, 0
|
||||
.cfi_signal_frame
|
||||
|
||||
li v0, __NR_sigreturn
|
||||
syscall
|
||||
|
||||
.cfi_endproc
|
||||
END(__vdso_sigreturn)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue