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https://github.com/torvalds/linux.git
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net: usb: lan78xx: Improve error handling in EEPROM and OTP operations
Refine error handling in EEPROM and OTP read/write functions by: - Return error values immediately upon detection. - Avoid overwriting correct error codes with `-EIO`. - Preserve initial error codes as they were appropriate for specific failures. - Use `-ETIMEDOUT` for timeout conditions instead of `-EIO`. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20241204084142.1152696-7-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Oleksij Rempel
Jakub Kicinski
parent
32ee0dc764
commit
8b1b2ca83b
1 changed files with 152 additions and 88 deletions
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@ -1000,8 +1000,8 @@ static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
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do {
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ret = lan78xx_read_reg(dev, E2P_CMD, &val);
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if (unlikely(ret < 0))
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return -EIO;
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if (ret < 0)
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return ret;
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if (!(val & E2P_CMD_EPC_BUSY_) ||
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(val & E2P_CMD_EPC_TIMEOUT_))
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@ -1011,7 +1011,7 @@ static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
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if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
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netdev_warn(dev->net, "EEPROM read operation timeout");
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return -EIO;
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return -ETIMEDOUT;
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}
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return 0;
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@ -1025,8 +1025,8 @@ static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
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do {
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ret = lan78xx_read_reg(dev, E2P_CMD, &val);
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if (unlikely(ret < 0))
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return -EIO;
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if (ret < 0)
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return ret;
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if (!(val & E2P_CMD_EPC_BUSY_))
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return 0;
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@ -1035,75 +1035,81 @@ static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
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} while (!time_after(jiffies, start_time + HZ));
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netdev_warn(dev->net, "EEPROM is busy");
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return -EIO;
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return -ETIMEDOUT;
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}
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static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
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u32 length, u8 *data)
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{
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u32 val;
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u32 saved;
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u32 val, saved;
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int i, ret;
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int retval;
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/* depends on chip, some EEPROM pins are muxed with LED function.
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* disable & restore LED function to access EEPROM.
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*/
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ret = lan78xx_read_reg(dev, HW_CFG, &val);
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if (ret < 0)
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return ret;
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saved = val;
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if (dev->chipid == ID_REV_CHIP_ID_7800_) {
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val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
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ret = lan78xx_write_reg(dev, HW_CFG, val);
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if (ret < 0)
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return ret;
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}
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retval = lan78xx_eeprom_confirm_not_busy(dev);
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if (retval)
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return retval;
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ret = lan78xx_eeprom_confirm_not_busy(dev);
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if (ret == -ETIMEDOUT)
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goto read_raw_eeprom_done;
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/* If USB fails, there is nothing to do */
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if (ret < 0)
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return ret;
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for (i = 0; i < length; i++) {
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val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
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val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
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ret = lan78xx_write_reg(dev, E2P_CMD, val);
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if (unlikely(ret < 0)) {
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retval = -EIO;
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goto exit;
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}
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if (ret < 0)
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return ret;
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retval = lan78xx_wait_eeprom(dev);
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if (retval < 0)
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goto exit;
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ret = lan78xx_wait_eeprom(dev);
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/* Looks like not USB specific error, try to recover */
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if (ret == -ETIMEDOUT)
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goto read_raw_eeprom_done;
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/* If USB fails, there is nothing to do */
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if (ret < 0)
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return ret;
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ret = lan78xx_read_reg(dev, E2P_DATA, &val);
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if (unlikely(ret < 0)) {
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retval = -EIO;
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goto exit;
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}
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if (ret < 0)
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return ret;
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data[i] = val & 0xFF;
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offset++;
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}
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retval = 0;
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exit:
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read_raw_eeprom_done:
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if (dev->chipid == ID_REV_CHIP_ID_7800_)
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ret = lan78xx_write_reg(dev, HW_CFG, saved);
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return lan78xx_write_reg(dev, HW_CFG, saved);
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return retval;
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return 0;
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}
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static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
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u32 length, u8 *data)
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{
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u8 sig;
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int ret;
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u8 sig;
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ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
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if ((ret == 0) && (sig == EEPROM_INDICATOR))
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ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
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else
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ret = -EINVAL;
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if (ret < 0)
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return ret;
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if (sig != EEPROM_INDICATOR)
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return -ENODATA;
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return lan78xx_read_raw_eeprom(dev, offset, length, data);
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}
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static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
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@ -1112,113 +1118,144 @@ static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
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u32 val;
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u32 saved;
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int i, ret;
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int retval;
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/* depends on chip, some EEPROM pins are muxed with LED function.
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* disable & restore LED function to access EEPROM.
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*/
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ret = lan78xx_read_reg(dev, HW_CFG, &val);
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if (ret < 0)
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return ret;
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saved = val;
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if (dev->chipid == ID_REV_CHIP_ID_7800_) {
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val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
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ret = lan78xx_write_reg(dev, HW_CFG, val);
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if (ret < 0)
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return ret;
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}
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retval = lan78xx_eeprom_confirm_not_busy(dev);
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if (retval)
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goto exit;
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ret = lan78xx_eeprom_confirm_not_busy(dev);
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/* Looks like not USB specific error, try to recover */
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if (ret == -ETIMEDOUT)
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goto write_raw_eeprom_done;
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/* If USB fails, there is nothing to do */
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if (ret < 0)
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return ret;
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/* Issue write/erase enable command */
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val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
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ret = lan78xx_write_reg(dev, E2P_CMD, val);
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if (unlikely(ret < 0)) {
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retval = -EIO;
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goto exit;
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}
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if (ret < 0)
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return ret;
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retval = lan78xx_wait_eeprom(dev);
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if (retval < 0)
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goto exit;
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ret = lan78xx_wait_eeprom(dev);
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/* Looks like not USB specific error, try to recover */
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if (ret == -ETIMEDOUT)
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goto write_raw_eeprom_done;
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/* If USB fails, there is nothing to do */
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if (ret < 0)
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return ret;
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for (i = 0; i < length; i++) {
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/* Fill data register */
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val = data[i];
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ret = lan78xx_write_reg(dev, E2P_DATA, val);
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if (ret < 0) {
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retval = -EIO;
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goto exit;
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}
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if (ret < 0)
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return ret;
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/* Send "write" command */
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val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
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val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
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ret = lan78xx_write_reg(dev, E2P_CMD, val);
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if (ret < 0) {
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retval = -EIO;
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goto exit;
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}
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if (ret < 0)
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return ret;
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retval = lan78xx_wait_eeprom(dev);
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if (retval < 0)
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goto exit;
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ret = lan78xx_wait_eeprom(dev);
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/* Looks like not USB specific error, try to recover */
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if (ret == -ETIMEDOUT)
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goto write_raw_eeprom_done;
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/* If USB fails, there is nothing to do */
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if (ret < 0)
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return ret;
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offset++;
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}
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retval = 0;
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exit:
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write_raw_eeprom_done:
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if (dev->chipid == ID_REV_CHIP_ID_7800_)
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ret = lan78xx_write_reg(dev, HW_CFG, saved);
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return lan78xx_write_reg(dev, HW_CFG, saved);
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return retval;
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return 0;
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}
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static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
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u32 length, u8 *data)
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{
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int i;
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u32 buf;
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unsigned long timeout;
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int ret, i;
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u32 buf;
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lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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if (ret < 0)
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return ret;
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if (buf & OTP_PWR_DN_PWRDN_N_) {
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/* clear it and wait to be cleared */
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lan78xx_write_reg(dev, OTP_PWR_DN, 0);
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ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
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if (ret < 0)
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return ret;
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timeout = jiffies + HZ;
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do {
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usleep_range(1, 10);
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lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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if (ret < 0)
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return ret;
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if (time_after(jiffies, timeout)) {
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netdev_warn(dev->net,
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"timeout on OTP_PWR_DN");
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return -EIO;
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return -ETIMEDOUT;
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}
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} while (buf & OTP_PWR_DN_PWRDN_N_);
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}
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for (i = 0; i < length; i++) {
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lan78xx_write_reg(dev, OTP_ADDR1,
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ret = lan78xx_write_reg(dev, OTP_ADDR1,
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((offset + i) >> 8) & OTP_ADDR1_15_11);
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lan78xx_write_reg(dev, OTP_ADDR2,
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((offset + i) & OTP_ADDR2_10_3));
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if (ret < 0)
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return ret;
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lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
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lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
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ret = lan78xx_write_reg(dev, OTP_ADDR2,
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((offset + i) & OTP_ADDR2_10_3));
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
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if (ret < 0)
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return ret;
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timeout = jiffies + HZ;
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do {
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udelay(1);
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lan78xx_read_reg(dev, OTP_STATUS, &buf);
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ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
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if (ret < 0)
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return ret;
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if (time_after(jiffies, timeout)) {
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netdev_warn(dev->net,
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"timeout on OTP_STATUS");
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return -EIO;
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return -ETIMEDOUT;
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}
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} while (buf & OTP_STATUS_BUSY_);
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lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
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ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
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if (ret < 0)
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return ret;
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data[i] = (u8)(buf & 0xFF);
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}
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@ -1232,45 +1269,72 @@ static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
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int i;
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u32 buf;
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unsigned long timeout;
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int ret;
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lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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if (ret < 0)
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return ret;
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if (buf & OTP_PWR_DN_PWRDN_N_) {
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/* clear it and wait to be cleared */
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lan78xx_write_reg(dev, OTP_PWR_DN, 0);
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ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
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if (ret < 0)
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return ret;
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timeout = jiffies + HZ;
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do {
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udelay(1);
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lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
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if (ret < 0)
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return ret;
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if (time_after(jiffies, timeout)) {
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netdev_warn(dev->net,
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"timeout on OTP_PWR_DN completion");
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return -EIO;
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return -ETIMEDOUT;
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}
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} while (buf & OTP_PWR_DN_PWRDN_N_);
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}
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/* set to BYTE program mode */
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lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
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ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
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if (ret < 0)
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return ret;
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for (i = 0; i < length; i++) {
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lan78xx_write_reg(dev, OTP_ADDR1,
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ret = lan78xx_write_reg(dev, OTP_ADDR1,
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((offset + i) >> 8) & OTP_ADDR1_15_11);
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lan78xx_write_reg(dev, OTP_ADDR2,
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_ADDR2,
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((offset + i) & OTP_ADDR2_10_3));
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lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
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lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
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lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
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if (ret < 0)
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return ret;
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ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
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if (ret < 0)
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return ret;
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timeout = jiffies + HZ;
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do {
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udelay(1);
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lan78xx_read_reg(dev, OTP_STATUS, &buf);
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ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
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if (ret < 0)
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return ret;
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if (time_after(jiffies, timeout)) {
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netdev_warn(dev->net,
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"Timeout on OTP_STATUS completion");
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return -EIO;
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return -ETIMEDOUT;
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}
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} while (buf & OTP_STATUS_BUSY_);
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}
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