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ARCNET: add com20020 PCI IDs with metadata

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This patch adds metadata for the com20020 to prepare for devices with
multiple io address areas with multi card interfaces.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Grzeschik 2014-09-29 11:55:36 +02:00 committed by David S. Miller
parent a0d2e51390
commit 8c14f9c703
2 changed files with 197 additions and 35 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

216
drivers/net/arcnet/com20020-pci.c
View file

@ -63,6 +63,8 @@ MODULE_LICENSE("GPL");
static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{ {
struct com20020_pci_channel_map *cm;
struct com20020_pci_card_info *ci;
struct net_device *dev; struct net_device *dev;
struct arcnet_local *lp; struct arcnet_local *lp;
int ioaddr, err; int ioaddr, err;
@ -75,19 +77,15 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
dev->netdev_ops = &com20020_netdev_ops; dev->netdev_ops = &com20020_netdev_ops;
ci = (struct com20020_pci_card_info *)id->driver_data;
lp = netdev_priv(dev); lp = netdev_priv(dev);
pci_set_drvdata(pdev, dev); pci_set_drvdata(pdev, dev);
// SOHARD needs PCI base addr 4 cm = &ci->chan_map_tbl[0];
if (pdev->vendor==0x10B5) { BUGMSG(D_NORMAL, "%s Controls\n", ci->name);
BUGMSG(D_NORMAL, "SOHARD\n"); ioaddr = pci_resource_start(pdev, cm->bar);
ioaddr = pci_resource_start(pdev, 4);
}
else {
BUGMSG(D_NORMAL, "Contemporary Controls\n");
ioaddr = pci_resource_start(pdev, 2);
}
if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "com20020-pci")) { if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "com20020-pci")) {
BUGMSG(D_INIT, "IO region %xh-%xh already allocated.\n", BUGMSG(D_INIT, "IO region %xh-%xh already allocated.\n",
@ -105,7 +103,7 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
dev->irq = pdev->irq; dev->irq = pdev->irq;
dev->dev_addr[0] = node; dev->dev_addr[0] = node;
lp->card_name = "PCI COM20020"; lp->card_name = "PCI COM20020";
lp->card_flags = id->driver_data; lp->card_flags = ci->flags;
lp->backplane = backplane; lp->backplane = backplane;
lp->clockp = clockp & 7; lp->clockp = clockp & 7;
lp->clockm = clockm & 3; lp->clockm = clockm & 3;
@ -144,32 +142,180 @@ static void com20020pci_remove(struct pci_dev *pdev)
free_netdev(dev); free_netdev(dev);
} }
static struct com20020_pci_card_info card_info_10mbit = {
.name = "ARC-PCI",
.devcount = 1,
.chan_map_tbl = {
{ 2, 0x00, 0x08 },
},
.flags = ARC_CAN_10MBIT,
};
static struct com20020_pci_card_info card_info_5mbit = {
.name = "ARC-PCI",
.devcount = 1,
.chan_map_tbl = {
{ 2, 0x00, 0x08 },
},
.flags = ARC_IS_5MBIT,
};
static struct com20020_pci_card_info card_info_sohard = {
.name = "PLX-PCI",
.devcount = 1,
/* SOHARD needs PCI base addr 4 */
.chan_map_tbl = {
{4, 0x00, 0x08},
},
.flags = ARC_CAN_10MBIT,
};
static const struct pci_device_id com20020pci_id_table[] = { static const struct pci_device_id com20020pci_id_table[] = {
{ 0x1571, 0xa001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, {
{ 0x1571, 0xa002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 0x1571, 0xa001,
{ 0x1571, 0xa003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, PCI_ANY_ID, PCI_ANY_ID,
{ 0x1571, 0xa004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 0, 0,
{ 0x1571, 0xa005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 0,
{ 0x1571, 0xa006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, },
{ 0x1571, 0xa007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, {
{ 0x1571, 0xa008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 0x1571, 0xa002,
{ 0x1571, 0xa009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, PCI_ANY_ID, PCI_ANY_ID,
{ 0x1571, 0xa00a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 0, 0,
{ 0x1571, 0xa00b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 0,
{ 0x1571, 0xa00c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, },
{ 0x1571, 0xa00d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, {
{ 0x1571, 0xa00e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 0x1571, 0xa003,
{ 0x1571, 0xa201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, PCI_ANY_ID, PCI_ANY_ID,
{ 0x1571, 0xa202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 0, 0,
{ 0x1571, 0xa203, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 0
{ 0x1571, 0xa204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, },
{ 0x1571, 0xa205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, {
{ 0x1571, 0xa206, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 0x1571, 0xa004,
{ 0x10B5, 0x9030, 0x10B5, 0x2978, 0, 0, ARC_CAN_10MBIT }, PCI_ANY_ID, PCI_ANY_ID,
{ 0x10B5, 0x9050, 0x10B5, 0x2273, 0, 0, ARC_CAN_10MBIT }, 0, 0,
{ 0x14BA, 0x6000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 0,
{ 0x10B5, 0x2200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, },
{0,} {
0x1571, 0xa005,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
0
},
{
0x1571, 0xa006,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
0
},
{
0x1571, 0xa007,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
0
},
{
0x1571, 0xa008,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
0
},
{
0x1571, 0xa009,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa00a,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa00b,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa00c,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa00d,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa00e,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_5mbit
},
{
0x1571, 0xa201,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x1571, 0xa202,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x1571, 0xa203,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x1571, 0xa204,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x1571, 0xa205,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x1571, 0xa206,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x10B5, 0x9030,
0x10B5, 0x2978,
0, 0,
(kernel_ulong_t)&card_info_sohard
},
{
0x10B5, 0x9050,
0x10B5, 0x2273,
0, 0,
(kernel_ulong_t)&card_info_sohard
},
{
0x14BA, 0x6000,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{
0x10B5, 0x2200,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
(kernel_ulong_t)&card_info_10mbit
},
{ 0, }
}; };
MODULE_DEVICE_TABLE(pci, com20020pci_id_table); MODULE_DEVICE_TABLE(pci, com20020pci_id_table);

16
include/linux/com20020.h
View file

@ -41,6 +41,22 @@ extern const struct net_device_ops com20020_netdev_ops;
#define BUS_ALIGN 1 #define BUS_ALIGN 1
#endif #endif
#define PLX_PCI_MAX_CARDS 1
struct com20020_pci_channel_map {
u32 bar;
u32 offset;
u32 size; /* 0x00 - auto, e.g. length of entire bar */
};
struct com20020_pci_card_info {
const char *name;
int devcount;
struct com20020_pci_channel_map chan_map_tbl[PLX_PCI_MAX_CARDS];
unsigned int flags;
};
#define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */ #define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */
#define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */ #define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */