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drm/vc4: Fix reading of frame count on GEN5 / Pi4

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The frame count values moved within registers DISPSTAT1 and
DISPSTAT2 with GEN5, so update the accessor function to
accommodate that.

Fixes: b51cd7ad14 ("drm/vc4: hvs: Fix frame count register readout")
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20241025-drm-vc4-2712-support-v2-2-35efa83c8fc0@raspberrypi.com
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This commit is contained in:
Dave Stevenson 2024-10-25 18:15:33 +01:00
parent 56aa4c374d
commit 8f2fc64773
2 changed files with 40 additions and 11 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

23
drivers/gpu/drm/vc4/vc4_hvs.c
View file

@ -272,6 +272,24 @@ u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
if (!drm_dev_enter(drm, &idx)) if (!drm_dev_enter(drm, &idx))
return 0; return 0;
switch (vc4->gen) {
case VC4_GEN_5:
switch (fifo) {
case 0:
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
SCALER5_DISPSTAT1_FRCNT0);
break;
case 1:
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
SCALER5_DISPSTAT1_FRCNT1);
break;
case 2:
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
SCALER5_DISPSTAT2_FRCNT2);
break;
}
break;
case VC4_GEN_4:
switch (fifo) { switch (fifo) {
case 0: case 0:
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1), field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
@ -286,6 +304,11 @@ u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
SCALER_DISPSTAT2_FRCNT2); SCALER_DISPSTAT2_FRCNT2);
break; break;
} }
break;
default:
drm_err(drm, "Unknown VC4 generation: %d", vc4->gen);
return 0;
}
drm_dev_exit(idx); drm_dev_exit(idx);
return field; return field;

6
drivers/gpu/drm/vc4/vc4_regs.h
View file

@ -418,6 +418,10 @@
# define SCALER_DISPSTAT1_FRCNT0_SHIFT 18 # define SCALER_DISPSTAT1_FRCNT0_SHIFT 18
# define SCALER_DISPSTAT1_FRCNT1_MASK VC4_MASK(17, 12) # define SCALER_DISPSTAT1_FRCNT1_MASK VC4_MASK(17, 12)
# define SCALER_DISPSTAT1_FRCNT1_SHIFT 12 # define SCALER_DISPSTAT1_FRCNT1_SHIFT 12
# define SCALER5_DISPSTAT1_FRCNT0_MASK VC4_MASK(25, 20)
# define SCALER5_DISPSTAT1_FRCNT0_SHIFT 20
# define SCALER5_DISPSTAT1_FRCNT1_MASK VC4_MASK(19, 14)
# define SCALER5_DISPSTAT1_FRCNT1_SHIFT 14
#define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \ #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \
(x) * (SCALER_DISPSTAT1 - \ (x) * (SCALER_DISPSTAT1 - \
@ -436,6 +440,8 @@
#define SCALER_DISPSTAT2 0x00000068 #define SCALER_DISPSTAT2 0x00000068
# define SCALER_DISPSTAT2_FRCNT2_MASK VC4_MASK(17, 12) # define SCALER_DISPSTAT2_FRCNT2_MASK VC4_MASK(17, 12)
# define SCALER_DISPSTAT2_FRCNT2_SHIFT 12 # define SCALER_DISPSTAT2_FRCNT2_SHIFT 12
# define SCALER5_DISPSTAT2_FRCNT2_MASK VC4_MASK(19, 14)
# define SCALER5_DISPSTAT2_FRCNT2_SHIFT 14
#define SCALER_DISPBASE2 0x0000006c #define SCALER_DISPBASE2 0x0000006c
#define SCALER_DISPALPHA2 0x00000070 #define SCALER_DISPALPHA2 0x00000070