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PCI: cadence: Use cdns_pcie_find_*capability() to avoid hardcoding offsets
The PCI capability/extended capability offsets are not guaranteed to be the
same across all SoCs integrating the Cadence PCIe IP.
Use the cdns_pcie_find_{ext}_capability() APIs to find the capabilities,
which avoids hardcoding the offsets in the driver.
Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20250813144529.303548-7-18255117159@163.com
This commit is contained in:
Hans Zhang
Bjorn Helgaas
parent
18ac51ae9d
commit
907912c1da
2 changed files with 22 additions and 21 deletions
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@ -21,12 +21,13 @@
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static u8 cdns_pcie_get_fn_from_vfn(struct cdns_pcie *pcie, u8 fn, u8 vfn)
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{
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u32 cap = CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET;
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u32 first_vf_offset, stride;
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u16 cap;
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if (vfn == 0)
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return fn;
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cap = cdns_pcie_find_ext_capability(pcie, PCI_EXT_CAP_ID_SRIOV);
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first_vf_offset = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_OFFSET);
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stride = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_STRIDE);
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fn = fn + first_vf_offset + ((vfn - 1) * stride);
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@ -38,10 +39,11 @@ static int cdns_pcie_ep_write_header(struct pci_epc *epc, u8 fn, u8 vfn,
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struct pci_epf_header *hdr)
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{
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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u32 cap = CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET;
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struct cdns_pcie *pcie = &ep->pcie;
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u32 reg;
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u16 cap;
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cap = cdns_pcie_find_ext_capability(pcie, PCI_EXT_CAP_ID_SRIOV);
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if (vfn > 1) {
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dev_err(&epc->dev, "Only Virtual Function #1 has deviceID\n");
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return -EINVAL;
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@ -227,9 +229,10 @@ static int cdns_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn, u8 nr_irqs)
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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struct cdns_pcie *pcie = &ep->pcie;
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u8 mmc = order_base_2(nr_irqs);
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u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;
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u16 flags;
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u8 cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSI);
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fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);
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/*
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@ -249,9 +252,10 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
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{
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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struct cdns_pcie *pcie = &ep->pcie;
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u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;
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u16 flags, mme;
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u8 cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSIX);
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fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);
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/* Validate that the MSI feature is actually enabled. */
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@ -272,9 +276,10 @@ static int cdns_pcie_ep_get_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
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{
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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struct cdns_pcie *pcie = &ep->pcie;
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u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;
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u32 val, reg;
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u8 cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSIX);
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func_no = cdns_pcie_get_fn_from_vfn(pcie, func_no, vfunc_no);
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reg = cap + PCI_MSIX_FLAGS;
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@ -292,9 +297,10 @@ static int cdns_pcie_ep_set_msix(struct pci_epc *epc, u8 fn, u8 vfn,
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{
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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struct cdns_pcie *pcie = &ep->pcie;
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u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;
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u32 val, reg;
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u8 cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSIX);
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fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);
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reg = cap + PCI_MSIX_FLAGS;
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@ -380,11 +386,11 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
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u8 interrupt_num)
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{
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struct cdns_pcie *pcie = &ep->pcie;
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u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;
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u16 flags, mme, data, data_mask;
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u8 msi_count;
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u64 pci_addr, pci_addr_mask = 0xff;
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u8 msi_count, cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSI);
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fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);
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/* Check whether the MSI feature has been enabled by the PCI host. */
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@ -432,14 +438,14 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn,
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u32 *msi_addr_offset)
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{
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struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
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u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;
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struct cdns_pcie *pcie = &ep->pcie;
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u64 pci_addr, pci_addr_mask = 0xff;
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u16 flags, mme, data, data_mask;
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u8 msi_count;
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u8 msi_count, cap;
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int ret;
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int i;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSI);
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fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);
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/* Check whether the MSI feature has been enabled by the PCI host. */
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@ -482,16 +488,16 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn,
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static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
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u16 interrupt_num)
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{
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u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;
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u32 tbl_offset, msg_data, reg;
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struct cdns_pcie *pcie = &ep->pcie;
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struct pci_epf_msix_tbl *msix_tbl;
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struct cdns_pcie_epf *epf;
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u64 pci_addr_mask = 0xff;
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u64 msg_addr;
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u8 bir, cap;
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u16 flags;
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u8 bir;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_MSIX);
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epf = &ep->epf[fn];
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if (vfn > 0)
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epf = &epf->epf[vfn - 1];
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@ -565,7 +571,9 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
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int max_epfs = sizeof(epc->function_num_map) * 8;
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int ret, epf, last_fn;
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u32 reg, value;
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u8 cap;
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cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_EXP);
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/*
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* BIT(0) is hardwired to 1, hence function 0 is always enabled
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* and can't be disabled anyway.
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@ -589,12 +597,10 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
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continue;
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value = cdns_pcie_ep_fn_readl(pcie, epf,
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CDNS_PCIE_EP_FUNC_DEV_CAP_OFFSET +
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PCI_EXP_DEVCAP);
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cap + PCI_EXP_DEVCAP);
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value &= ~PCI_EXP_DEVCAP_FLR;
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cdns_pcie_ep_fn_writel(pcie, epf,
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CDNS_PCIE_EP_FUNC_DEV_CAP_OFFSET +
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PCI_EXP_DEVCAP, value);
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cap + PCI_EXP_DEVCAP, value);
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}
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}
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@ -125,11 +125,6 @@
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*/
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#define CDNS_PCIE_EP_FUNC_BASE(fn) (((fn) << 12) & GENMASK(19, 12))
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#define CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET 0x90
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#define CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET 0xb0
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#define CDNS_PCIE_EP_FUNC_DEV_CAP_OFFSET 0xc0
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#define CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET 0x200
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/*
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* Endpoint PF Registers
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*/
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