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	x86/entry: Switch page fault exception to IDTENTRY_RAW
Convert page fault exceptions to IDTENTRY_RAW:
  - Implement the C entry point with DEFINE_IDTENTRY_RAW
  - Add the CR2 read into the exception handler
  - Add the idtentry_enter/exit_cond_rcu() invocations in
    in the regular page fault handler and in the async PF
    part.
  - Emit the ASM stub with DECLARE_IDTENTRY_RAW
  - Remove the ASM idtentry in 64-bit
  - Remove the CR2 read from 64-bit
  - Remove the open coded ASM entry code in 32-bit
  - Fix up the XEN/PV code
  - Remove the old prototypes
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lore.kernel.org/r/20200521202118.238455120@linutronix.de
			
			
This commit is contained in:
		
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					 9 changed files with 63 additions and 92 deletions
				
			
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			@ -1398,36 +1398,6 @@ BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR,
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#endif /* CONFIG_HYPERV */
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SYM_CODE_START(page_fault)
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	ASM_CLAC
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	pushl	$do_page_fault
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	jmp	common_exception_read_cr2
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SYM_CODE_END(page_fault)
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SYM_CODE_START_LOCAL_NOALIGN(common_exception_read_cr2)
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	/* the function address is in %gs's slot on the stack */
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	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
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	ENCODE_FRAME_POINTER
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	/* fixup %gs */
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	GS_TO_REG %ecx
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	movl	PT_GS(%esp), %edi
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	REG_TO_PTGS %ecx
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	SET_KERNEL_GS %ecx
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	GET_CR2_INTO(%ecx)			# might clobber %eax
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	/* fixup orig %eax */
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	movl	PT_ORIG_EAX(%esp), %edx		# get the error code
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	movl	$-1, PT_ORIG_EAX(%esp)		# no syscall to restart
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	TRACE_IRQS_OFF
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	movl	%esp, %eax			# pt_regs pointer
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	CALL_NOSPEC edi
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	jmp	ret_from_exception
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SYM_CODE_END(common_exception_read_cr2)
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SYM_CODE_START_LOCAL_NOALIGN(common_exception)
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	/* the function address is in %gs's slot on the stack */
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	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
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			@ -506,15 +506,6 @@ SYM_CODE_END(spurious_entries_start)
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	call	error_entry
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	UNWIND_HINT_REGS
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	.if \vector == X86_TRAP_PF
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		/*
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		 * Store CR2 early so subsequent faults cannot clobber it. Use R12 as
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		 * intermediate storage as RDX can be clobbered in enter_from_user_mode().
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		 * GET_CR2_INTO can clobber RAX.
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		 */
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		GET_CR2_INTO(%r12);
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	.endif
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	.if \sane == 0
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	TRACE_IRQS_OFF
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			@ -533,10 +524,6 @@ SYM_CODE_END(spurious_entries_start)
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		movq	$-1, ORIG_RAX(%rsp)	/* no syscall to restart */
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	.endif
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	.if \vector == X86_TRAP_PF
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		movq	%r12, %rdx		/* Move CR2 into 3rd argument */
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	.endif
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	call	\cfunc
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	.if \sane == 0
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			@ -1059,12 +1046,6 @@ apicinterrupt SPURIOUS_APIC_VECTOR		spurious_interrupt		smp_spurious_interrupt
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apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt
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#endif
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/*
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 * Exception entry points.
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 */
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idtentry	X86_TRAP_PF		page_fault		do_page_fault			has_error_code=1
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/*
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 * Reload gs selector with exception handling
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 * edi:  new selector
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			@ -387,7 +387,8 @@ DECLARE_IDTENTRY_ERRORCODE(X86_TRAP_GP,	exc_general_protection);
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DECLARE_IDTENTRY_ERRORCODE(X86_TRAP_AC,	exc_alignment_check);
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/* Raw exception entries which need extra work */
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DECLARE_IDTENTRY_RAW(X86_TRAP_BP,	exc_int3);
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DECLARE_IDTENTRY_RAW(X86_TRAP_BP,		exc_int3);
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DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF,	exc_page_fault);
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#ifdef CONFIG_X86_MCE
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DECLARE_IDTENTRY_MCE(X86_TRAP_MC,	exc_machine_check);
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			@ -9,17 +9,6 @@
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#include <asm/idtentry.h>
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#include <asm/siginfo.h>			/* TRAP_TRACE, ... */
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#define dotraplinkage __visible
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asmlinkage void page_fault(void);
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asmlinkage void async_page_fault(void);
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#if defined(CONFIG_X86_64) && defined(CONFIG_XEN_PV)
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asmlinkage void xen_page_fault(void);
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#endif
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dotraplinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, unsigned long address);
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#ifdef CONFIG_X86_64
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asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs);
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asmlinkage __visible notrace
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			@ -62,7 +62,7 @@ static const __initconst struct idt_data early_idts[] = {
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	INTG(X86_TRAP_DB,		asm_exc_debug),
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	SYSG(X86_TRAP_BP,		asm_exc_int3),
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#ifdef CONFIG_X86_32
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	INTG(X86_TRAP_PF,		page_fault),
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	INTG(X86_TRAP_PF,		asm_exc_page_fault),
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#endif
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};
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			@ -156,7 +156,7 @@ static const __initconst struct idt_data apic_idts[] = {
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 * stacks work only after cpu_init().
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 */
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static const __initconst struct idt_data early_pf_idts[] = {
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	INTG(X86_TRAP_PF,		page_fault),
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	INTG(X86_TRAP_PF,		asm_exc_page_fault),
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};
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/*
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			@ -218,7 +218,7 @@ void kvm_async_pf_task_wake(u32 token)
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}
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EXPORT_SYMBOL_GPL(kvm_async_pf_task_wake);
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u32 kvm_read_and_reset_apf_flags(void)
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noinstr u32 kvm_read_and_reset_apf_flags(void)
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{
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	u32 flags = 0;
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			@ -230,11 +230,11 @@ u32 kvm_read_and_reset_apf_flags(void)
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	return flags;
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}
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EXPORT_SYMBOL_GPL(kvm_read_and_reset_apf_flags);
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NOKPROBE_SYMBOL(kvm_read_and_reset_apf_flags);
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bool __kvm_handle_async_pf(struct pt_regs *regs, u32 token)
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noinstr bool __kvm_handle_async_pf(struct pt_regs *regs, u32 token)
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{
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	u32 reason = kvm_read_and_reset_apf_flags();
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	bool rcu_exit;
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	switch (reason) {
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	case KVM_PV_REASON_PAGE_NOT_PRESENT:
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			@ -244,6 +244,9 @@ bool __kvm_handle_async_pf(struct pt_regs *regs, u32 token)
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		return false;
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	}
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	rcu_exit = idtentry_enter_cond_rcu(regs);
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	instrumentation_begin();
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	/*
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	 * If the host managed to inject an async #PF into an interrupt
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	 * disabled region, then die hard as this is not going to end well
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			@ -258,13 +261,13 @@ bool __kvm_handle_async_pf(struct pt_regs *regs, u32 token)
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		/* Page is swapped out by the host. */
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		kvm_async_pf_task_wait_schedule(token);
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	} else {
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		rcu_irq_enter();
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		kvm_async_pf_task_wake(token);
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		rcu_irq_exit();
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	}
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	instrumentation_end();
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	idtentry_exit_cond_rcu(regs, rcu_exit);
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	return true;
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}
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NOKPROBE_SYMBOL(__kvm_handle_async_pf);
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static void __init paravirt_ops_setup(void)
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{
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			@ -1357,11 +1357,38 @@ trace_page_fault_entries(struct pt_regs *regs, unsigned long error_code,
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		trace_page_fault_kernel(address, regs, error_code);
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}
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dotraplinkage void
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do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
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		unsigned long address)
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static __always_inline void
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handle_page_fault(struct pt_regs *regs, unsigned long error_code,
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			      unsigned long address)
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{
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	trace_page_fault_entries(regs, error_code, address);
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	if (unlikely(kmmio_fault(regs, address)))
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		return;
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	/* Was the fault on kernel-controlled part of the address space? */
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	if (unlikely(fault_in_kernel_space(address))) {
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		do_kern_addr_fault(regs, error_code, address);
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	} else {
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		do_user_addr_fault(regs, error_code, address);
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		/*
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		 * User address page fault handling might have reenabled
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		 * interrupts. Fixing up all potential exit points of
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		 * do_user_addr_fault() and its leaf functions is just not
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		 * doable w/o creating an unholy mess or turning the code
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		 * upside down.
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		 */
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		local_irq_disable();
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	}
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}
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DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault)
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{
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	unsigned long address = read_cr2();
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	bool rcu_exit;
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	prefetchw(¤t->mm->mmap_lock);
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	/*
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	 * KVM has two types of events that are, logically, interrupts, but
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	 * are unfortunately delivered using the #PF vector.  These events are
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			@ -1376,28 +1403,28 @@ do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
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	 * getting values from real and async page faults mixed up.
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	 *
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	 * Fingers crossed.
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	 *
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	 * The async #PF handling code takes care of idtentry handling
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	 * itself.
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	 */
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	if (kvm_handle_async_pf(regs, (u32)address))
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		return;
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	trace_page_fault_entries(regs, hw_error_code, address);
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	/*
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	 * Entry handling for valid #PF from kernel mode is slightly
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	 * different: RCU is already watching and rcu_irq_enter() must not
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	 * be invoked because a kernel fault on a user space address might
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	 * sleep.
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	 *
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	 * In case the fault hit a RCU idle region the conditional entry
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	 * code reenabled RCU to avoid subsequent wreckage which helps
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	 * debugability.
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	 */
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	rcu_exit = idtentry_enter_cond_rcu(regs);
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	if (unlikely(kmmio_fault(regs, address)))
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		return;
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	instrumentation_begin();
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	handle_page_fault(regs, error_code, address);
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	instrumentation_end();
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	/* Was the fault on kernel-controlled part of the address space? */
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	if (unlikely(fault_in_kernel_space(address))) {
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		do_kern_addr_fault(regs, hw_error_code, address);
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	} else {
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		do_user_addr_fault(regs, hw_error_code, address);
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		/*
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		 * User address page fault handling might have reenabled
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		 * interrupts. Fixing up all potential exit points of
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		 * do_user_addr_fault() and its leaf functions is just not
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		 * doable w/o creating an unholy mess or turning the code
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		 * upside down.
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		 */
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		local_irq_disable();
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	}
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	idtentry_exit_cond_rcu(regs, rcu_exit);
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}
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NOKPROBE_SYMBOL(do_page_fault);
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			@ -626,7 +626,7 @@ static struct trap_array_entry trap_array[] = {
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#ifdef CONFIG_IA32_EMULATION
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	{ entry_INT80_compat,          xen_entry_INT80_compat,          false },
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#endif
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	{ page_fault,                  xen_page_fault,                  false },
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	TRAP_ENTRY(exc_page_fault,			false ),
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	TRAP_ENTRY(exc_divide_error,			false ),
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	TRAP_ENTRY(exc_bounds,				false ),
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	TRAP_ENTRY(exc_invalid_op,			false ),
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			@ -43,7 +43,7 @@ xen_pv_trap asm_exc_invalid_tss
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xen_pv_trap asm_exc_segment_not_present
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xen_pv_trap asm_exc_stack_segment
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xen_pv_trap asm_exc_general_protection
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xen_pv_trap page_fault
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xen_pv_trap asm_exc_page_fault
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xen_pv_trap asm_exc_spurious_interrupt_bug
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xen_pv_trap asm_exc_coprocessor_error
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xen_pv_trap asm_exc_alignment_check
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