mirror of
https://github.com/torvalds/linux.git
synced 2025-10-31 16:48:26 +02:00
Remove Intel compiler support
include/linux/compiler-intel.h had no update in the past 3 years.
We often forget about the third C compiler to build the kernel.
For example, commit a0a12c3ed0 ("asm goto: eradicate CC_HAS_ASM_GOTO")
only mentioned GCC and Clang.
init/Kconfig defines CC_IS_GCC and CC_IS_CLANG but not CC_IS_ICC,
and nobody has reported any issue.
I guess the Intel Compiler support is broken, and nobody is caring
about it.
Harald Arnesen pointed out ICC (classic Intel C/C++ compiler) is
deprecated:
$ icc -v
icc: remark #10441: The Intel(R) C++ Compiler Classic (ICC) is
deprecated and will be removed from product release in the second half
of 2023. The Intel(R) oneAPI DPC++/C++ Compiler (ICX) is the recommended
compiler moving forward. Please transition to use this compiler. Use
'-diag-disable=10441' to disable this message.
icc version 2021.7.0 (gcc version 12.1.0 compatibility)
Arnd Bergmann provided a link to the article, "Intel C/C++ compilers
complete adoption of LLVM".
lib/zstd/common/compiler.h and lib/zstd/compress/zstd_fast.c were kept
untouched for better sync with https://github.com/facebook/zstd
Link: https://www.intel.com/content/www/us/en/developer/articles/technical/adoption-of-llvm-complete-icx.html
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Masahiro Yamada
Linus Torvalds
parent
b01fe98d34
commit
95207db816
11 changed files with 5 additions and 287 deletions
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@ -15,11 +15,7 @@
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#include <linux/types.h>
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/* include compiler specific intrinsics */
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#include <asm/ia64regs.h>
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#ifdef __INTEL_COMPILER
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# include <asm/intel_intrin.h>
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#else
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# include <asm/gcc_intrin.h>
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#endif
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#include <asm/gcc_intrin.h>
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/*
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* This function doesn't exist, so you'll get a linker error if
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@ -1,162 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _ASM_IA64_INTEL_INTRIN_H
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#define _ASM_IA64_INTEL_INTRIN_H
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/*
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* Intel Compiler Intrinsics
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*
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* Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
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* Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
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* Copyright (C) 2005,2006 Hongjiu Lu <hongjiu.lu@intel.com>
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*
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*/
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#include <ia64intrin.h>
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#define ia64_barrier() __memory_barrier()
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#define ia64_stop() /* Nothing: As of now stop bit is generated for each
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* intrinsic
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*/
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#define ia64_getreg __getReg
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#define ia64_setreg __setReg
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#define ia64_hint __hint
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#define ia64_hint_pause __hint_pause
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#define ia64_mux1_brcst _m64_mux1_brcst
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#define ia64_mux1_mix _m64_mux1_mix
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#define ia64_mux1_shuf _m64_mux1_shuf
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#define ia64_mux1_alt _m64_mux1_alt
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#define ia64_mux1_rev _m64_mux1_rev
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#define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v)))
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#define ia64_popcnt _m64_popcnt
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#define ia64_getf_exp __getf_exp
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#define ia64_shrp _m64_shrp
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#define ia64_tpa __tpa
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#define ia64_invala __invala
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#define ia64_invala_gr __invala_gr
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#define ia64_invala_fr __invala_fr
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#define ia64_nop __nop
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#define ia64_sum __sum
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#define ia64_ssm __ssm
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#define ia64_rum __rum
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#define ia64_rsm __rsm
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#define ia64_fc __fc
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#define ia64_ldfs __ldfs
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#define ia64_ldfd __ldfd
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#define ia64_ldfe __ldfe
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#define ia64_ldf8 __ldf8
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#define ia64_ldf_fill __ldf_fill
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#define ia64_stfs __stfs
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#define ia64_stfd __stfd
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#define ia64_stfe __stfe
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#define ia64_stf8 __stf8
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#define ia64_stf_spill __stf_spill
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#define ia64_mf __mf
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#define ia64_mfa __mfa
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#define ia64_fetchadd4_acq __fetchadd4_acq
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#define ia64_fetchadd4_rel __fetchadd4_rel
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#define ia64_fetchadd8_acq __fetchadd8_acq
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#define ia64_fetchadd8_rel __fetchadd8_rel
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#define ia64_xchg1 _InterlockedExchange8
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#define ia64_xchg2 _InterlockedExchange16
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#define ia64_xchg4 _InterlockedExchange
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#define ia64_xchg8 _InterlockedExchange64
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#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel
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#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq
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#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel
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#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq
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#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel
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#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq
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#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel
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#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq
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#define __ia64_set_dbr(index, val) \
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__setIndReg(_IA64_REG_INDR_DBR, index, val)
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#define ia64_set_ibr(index, val) \
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__setIndReg(_IA64_REG_INDR_IBR, index, val)
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#define ia64_set_pkr(index, val) \
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__setIndReg(_IA64_REG_INDR_PKR, index, val)
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#define ia64_set_pmc(index, val) \
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__setIndReg(_IA64_REG_INDR_PMC, index, val)
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#define ia64_set_pmd(index, val) \
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__setIndReg(_IA64_REG_INDR_PMD, index, val)
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#define ia64_set_rr(index, val) \
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__setIndReg(_IA64_REG_INDR_RR, index, val)
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#define ia64_get_cpuid(index) \
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__getIndReg(_IA64_REG_INDR_CPUID, index)
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#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index)
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#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index)
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#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index)
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#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index)
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#define ia64_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
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#define ia64_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
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#define ia64_srlz_d __dsrlz
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#define ia64_srlz_i __isrlz
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#define ia64_dv_serialize_data()
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#define ia64_dv_serialize_instruction()
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#define ia64_st1_rel __st1_rel
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#define ia64_st2_rel __st2_rel
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#define ia64_st4_rel __st4_rel
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#define ia64_st8_rel __st8_rel
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/* FIXME: need st4.rel.nta intrinsic */
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#define ia64_st4_rel_nta __st4_rel
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#define ia64_ld1_acq __ld1_acq
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#define ia64_ld2_acq __ld2_acq
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#define ia64_ld4_acq __ld4_acq
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#define ia64_ld8_acq __ld8_acq
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#define ia64_sync_i __synci
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#define ia64_thash __thash
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#define ia64_ttag __ttag
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#define ia64_itcd __itcd
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#define ia64_itci __itci
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#define ia64_itrd __itrd
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#define ia64_itri __itri
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#define ia64_ptce __ptce
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#define ia64_ptcl __ptcl
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#define ia64_ptcg __ptcg
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#define ia64_ptcga __ptcga
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#define ia64_ptri __ptri
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#define ia64_ptrd __ptrd
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#define ia64_dep_mi _m64_dep_mi
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/* Values for lfhint in __lfetch and __lfetch_fault */
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#define ia64_lfhint_none __lfhint_none
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#define ia64_lfhint_nt1 __lfhint_nt1
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#define ia64_lfhint_nt2 __lfhint_nt2
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#define ia64_lfhint_nta __lfhint_nta
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#define ia64_lfetch __lfetch
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#define ia64_lfetch_excl __lfetch_excl
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#define ia64_lfetch_fault __lfetch_fault
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#define ia64_lfetch_fault_excl __lfetch_fault_excl
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#define ia64_intrin_local_irq_restore(x) \
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do { \
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if ((x) != 0) { \
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ia64_ssm(IA64_PSR_I); \
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ia64_srlz_d(); \
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} else { \
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ia64_rsm(IA64_PSR_I); \
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} \
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} while (0)
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#define __builtin_trap() __break(0);
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#endif /* _ASM_IA64_INTEL_INTRIN_H */
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@ -14,11 +14,7 @@
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#include <linux/types.h>
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/* include compiler specific intrinsics */
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#include <asm/ia64regs.h>
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#ifdef __INTEL_COMPILER
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# include <asm/intel_intrin.h>
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#else
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# include <asm/gcc_intrin.h>
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#endif
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#include <asm/gcc_intrin.h>
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#include <asm/cmpxchg.h>
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#define ia64_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
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@ -148,15 +148,12 @@
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*
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*****************************************************************************/
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#if defined(__GNUC__) && !defined(__INTEL_COMPILER)
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#if defined(__GNUC__)
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#include <acpi/platform/acgcc.h>
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#elif defined(_MSC_VER)
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#include "acmsvc.h"
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#elif defined(__INTEL_COMPILER)
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#include <acpi/platform/acintel.h>
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#endif
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#if defined(_LINUX) || defined(__linux__)
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@ -35,7 +35,7 @@
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#endif
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#if defined(__GNUC__) && !defined(__INTEL_COMPILER)
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#if defined(__GNUC__)
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#include "acgccex.h"
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#elif defined(_MSC_VER)
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@ -1,55 +0,0 @@
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/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
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/******************************************************************************
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*
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* Name: acintel.h - VC specific defines, etc.
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*
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* Copyright (C) 2000 - 2022, Intel Corp.
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*
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*****************************************************************************/
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#ifndef __ACINTEL_H__
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#define __ACINTEL_H__
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/*
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* Use compiler specific <stdarg.h> is a good practice for even when
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* -nostdinc is specified (i.e., ACPI_USE_STANDARD_HEADERS undefined.
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*/
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#ifndef va_arg
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#include <stdarg.h>
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#endif
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/* Configuration specific to Intel 64-bit C compiler */
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#define COMPILER_DEPENDENT_INT64 __int64
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#define COMPILER_DEPENDENT_UINT64 unsigned __int64
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#define ACPI_INLINE __inline
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/*
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* Calling conventions:
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*
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* ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
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* ACPI_EXTERNAL_XFACE - External ACPI interfaces
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* ACPI_INTERNAL_XFACE - Internal ACPI interfaces
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* ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
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*/
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#define ACPI_SYSTEM_XFACE
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#define ACPI_EXTERNAL_XFACE
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#define ACPI_INTERNAL_XFACE
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#define ACPI_INTERNAL_VAR_XFACE
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/* remark 981 - operands evaluated in no particular order */
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#pragma warning(disable:981)
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/* warn C4100: unreferenced formal parameter */
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#pragma warning(disable:4100)
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/* warn C4127: conditional expression is constant */
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#pragma warning(disable:4127)
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/* warn C4706: assignment within conditional expression */
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#pragma warning(disable:4706)
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/* warn C4214: bit field types other than int */
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#pragma warning(disable:4214)
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#endif /* __ACINTEL_H__ */
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@ -1,34 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LINUX_COMPILER_TYPES_H
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#error "Please don't include <linux/compiler-intel.h> directly, include <linux/compiler.h> instead."
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#endif
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#ifdef __ECC
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/* Compiler specific definitions for Intel ECC compiler */
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#include <asm/intrinsics.h>
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/* Intel ECC compiler doesn't support gcc specific asm stmts.
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* It uses intrinsics to do the equivalent things.
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*/
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#define barrier() __memory_barrier()
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#define barrier_data(ptr) barrier()
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#define RELOC_HIDE(ptr, off) \
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({ unsigned long __ptr; \
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__ptr = (unsigned long) (ptr); \
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(typeof(ptr)) (__ptr + (off)); })
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/* This should act as an optimization barrier on var.
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* Given that this compiler does not have inline assembly, a compiler barrier
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* is the best we can do.
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*/
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#define OPTIMIZER_HIDE_VAR(var) barrier()
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#endif
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/* icc has this, but it's called _bswap16 */
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#define __HAVE_BUILTIN_BSWAP16__
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#define __builtin_bswap16 _bswap16
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* compiler should see some alignment anyway, when the return value is
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* massaged by 'flags = ptr & 3; ptr &= ~3;').
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*
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* Optional: not supported by icc
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*
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* gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-assume_005faligned-function-attribute
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* clang: https://clang.llvm.org/docs/AttributeReference.html#assume-aligned
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*/
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#if __has_attribute(__assume_aligned__)
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# define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__)))
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#else
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# define __assume_aligned(a, ...)
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#endif
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#define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__)))
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/*
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* Note the long name.
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/*
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* Optional: only supported since gcc >= 9
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* Optional: not supported by clang
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* Optional: not supported by icc
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*
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* gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-copy-function-attribute
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*/
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@ -98,7 +91,6 @@
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/*
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* Optional: not supported by gcc
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* Optional: only supported since clang >= 14.0
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* Optional: not supported by icc
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*
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* clang: https://clang.llvm.org/docs/AttributeReference.html#diagnose_as_builtin
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*/
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@ -122,7 +114,6 @@
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/*
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* Optional: not supported by clang
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* Optional: not supported by icc
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*
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* gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#index-designated_005finit-type-attribute
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*/
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@ -236,7 +227,6 @@
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/*
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* Optional: only supported since gcc >= 8
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* Optional: not supported by clang
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* Optional: not supported by icc
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*
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* gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-nonstring-variable-attribute
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*/
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@ -267,7 +257,6 @@
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/*
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* Optional: not supported by gcc.
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* Optional: not supported by icc.
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*
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* clang: https://clang.llvm.org/docs/AttributeReference.html#overloadable
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*/
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@ -287,7 +276,6 @@
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* Note: the "type" argument should match any __builtin_object_size(p, type) usage.
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*
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* Optional: not supported by gcc.
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* Optional: not supported by icc.
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*
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* clang: https://clang.llvm.org/docs/AttributeReference.html#pass-object-size-pass-dynamic-object-size
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*/
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@ -120,8 +120,6 @@ static inline void __chk_io_ptr(const volatile void __iomem *ptr) { }
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/* Compiler specific macros. */
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#ifdef __clang__
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#include <linux/compiler-clang.h>
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#elif defined(__INTEL_COMPILER)
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#include <linux/compiler-intel.h>
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#elif defined(__GNUC__)
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/* The above compilers also define __GNUC__, so order is important here. */
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#include <linux/compiler-gcc.h>
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@ -12,8 +12,6 @@ get_c_compiler_info()
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cat <<- EOF | "$@" -E -P -x c - 2>/dev/null
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#if defined(__clang__)
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Clang __clang_major__ __clang_minor__ __clang_patchlevel__
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#elif defined(__INTEL_COMPILER)
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ICC __INTEL_COMPILER __INTEL_COMPILER_UPDATE
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#elif defined(__GNUC__)
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GCC __GNUC__ __GNUC_MINOR__ __GNUC_PATCHLEVEL__
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -19,10 +19,6 @@ binutils)
|
|||
gcc)
|
||||
echo 5.1.0
|
||||
;;
|
||||
icc)
|
||||
# temporary
|
||||
echo 16.0.3
|
||||
;;
|
||||
llvm)
|
||||
if [ "$SRCARCH" = s390 ]; then
|
||||
echo 15.0.0
|
||||
|
|
|
|||
Loading…
Reference in a new issue