mirror of
https://github.com/torvalds/linux.git
synced 2025-11-04 10:40:15 +02:00
ARM: pxa: remove Compulab pxa2xx boards
As these boards have no more users nor testers, and patching them has become a burden, be that because of the PCI part or the MTD NAND support, let's remove them. The cm-x300 will for now remain and represent Compulab boards at its best in the PXA department. Link: https://lore.kernel.org/r/20200521185140.27276-1-robert.jarzmik@free.fr Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Mike Rapoport <rppt@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Robert Jarzmik
Arnd Bergmann
parent
803b504bf5
commit
9d3239147d
12 changed files with 0 additions and 3086 deletions
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@ -1,173 +0,0 @@
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# CONFIG_LOCALVERSION_AUTO is not set
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CONFIG_SYSVIPC=y
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CONFIG_IKCONFIG=y
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||||
CONFIG_IKCONFIG_PROC=y
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||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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||||
# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_PXA=y
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||||
CONFIG_MACH_ARMCORE=y
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||||
CONFIG_PCI=y
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||||
CONFIG_PCCARD=m
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||||
CONFIG_YENTA=m
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||||
# CONFIG_YENTA_O2 is not set
|
||||
# CONFIG_YENTA_RICOH is not set
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||||
# CONFIG_YENTA_ENE_TUNE is not set
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||||
# CONFIG_YENTA_TOSHIBA is not set
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||||
CONFIG_PCMCIA_PXA2XX=m
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CONFIG_NO_HZ=y
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||||
CONFIG_AEABI=y
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||||
CONFIG_ZBOOT_ROM_TEXT=0x0
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||||
CONFIG_ZBOOT_ROM_BSS=0x0
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||||
CONFIG_CMDLINE="root=1f03 mem=32M"
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||||
CONFIG_FPE_NWFPE=y
|
||||
CONFIG_PM=y
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||||
CONFIG_APM_EMULATION=m
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||||
CONFIG_NET=y
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||||
CONFIG_PACKET=y
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||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
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||||
CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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||||
# CONFIG_INET_DIAG is not set
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# CONFIG_IPV6 is not set
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CONFIG_BT=m
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CONFIG_BT_RFCOMM=m
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CONFIG_BT_BNEP=m
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CONFIG_BT_HIDP=m
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CONFIG_LIB80211=m
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||||
CONFIG_FW_LOADER=m
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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CONFIG_MTD_CFI_INTELEXT=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_CFI_STAA=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_PXA2XX=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_MTD_NAND_GPIO=m
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CONFIG_MTD_NAND_CM_X270=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_ATA=m
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# CONFIG_SATA_PMP is not set
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CONFIG_PATA_PCMCIA=m
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CONFIG_NETDEVICES=y
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CONFIG_NET_ETHERNET=y
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CONFIG_DM9000=y
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CONFIG_DM9000_DEBUGLEVEL=1
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CONFIG_NET_PCI=y
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CONFIG_8139TOO=m
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# CONFIG_8139TOO_PIO is not set
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CONFIG_PPP=m
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CONFIG_PPP_MULTILINK=y
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CONFIG_PPP_FILTER=y
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CONFIG_PPP_ASYNC=m
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CONFIG_PPP_DEFLATE=m
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CONFIG_PPP_BSDCOMP=m
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CONFIG_INPUT_EVDEV=y
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CONFIG_KEYBOARD_PXA27x=m
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# CONFIG_INPUT_MOUSE is not set
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CONFIG_INPUT_TOUCHSCREEN=y
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CONFIG_TOUCHSCREEN_UCB1400=m
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# CONFIG_SERIO_SERPORT is not set
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CONFIG_SERIAL_PXA=y
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CONFIG_SERIAL_PXA_CONSOLE=y
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CONFIG_LEGACY_PTY_COUNT=16
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=m
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CONFIG_I2C_PXA=y
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CONFIG_SPI=y
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CONFIG_SPI_PXA2XX=m
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# CONFIG_HWMON is not set
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CONFIG_UCB1400_CORE=m
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CONFIG_FB=y
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CONFIG_FB_PXA=y
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CONFIG_FB_PXA_PARAMETERS=y
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CONFIG_FB_MBX=m
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# CONFIG_LCD_CLASS_DEVICE is not set
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# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
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# CONFIG_VGA_CONSOLE is not set
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_LOGO=y
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CONFIG_SOUND=m
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CONFIG_SND=m
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CONFIG_SND_MIXER_OSS=m
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CONFIG_SND_PCM_OSS=m
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# CONFIG_SND_DRIVERS is not set
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# CONFIG_SND_PCI is not set
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CONFIG_SND_PXA2XX_AC97=m
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# CONFIG_SND_SPI is not set
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# CONFIG_SND_USB is not set
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# CONFIG_SND_PCMCIA is not set
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CONFIG_HID_A4TECH=y
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CONFIG_HID_APPLE=y
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CONFIG_HID_BELKIN=y
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CONFIG_HID_CHERRY=y
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CONFIG_HID_CHICONY=y
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CONFIG_HID_CYPRESS=y
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CONFIG_HID_EZKEY=y
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CONFIG_HID_GYRATION=y
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CONFIG_HID_LOGITECH=y
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CONFIG_HID_MICROSOFT=y
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CONFIG_HID_MONTEREY=y
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CONFIG_HID_PANTHERLORD=y
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CONFIG_HID_PETALYNX=y
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CONFIG_HID_SAMSUNG=y
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CONFIG_HID_SONY=y
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CONFIG_HID_SUNPLUS=y
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CONFIG_USB=y
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CONFIG_USB_MON=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_MMC=m
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CONFIG_MMC_PXA=m
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CONFIG_NEW_LEDS=y
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CONFIG_LEDS_CLASS=y
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CONFIG_LEDS_GPIO=m
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CONFIG_LEDS_TRIGGERS=y
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CONFIG_LEDS_TRIGGER_HEARTBEAT=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_V3020=y
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CONFIG_RTC_DRV_PXA=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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CONFIG_VFAT_FS=m
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# CONFIG_PROC_PAGE_MONITOR is not set
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CONFIG_TMPFS=y
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CONFIG_JFFS2_FS=y
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CONFIG_JFFS2_SUMMARY=y
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CONFIG_NFS_FS=y
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CONFIG_NFS_V3=y
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CONFIG_ROOT_NFS=y
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CONFIG_CIFS=m
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_NLS_CODEPAGE_437=m
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CONFIG_NLS_ISO8859_1=m
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CONFIG_NLS_UTF8=m
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CONFIG_FRAME_WARN=0
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CONFIG_DEBUG_KERNEL=y
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# CONFIG_DETECT_SOFTLOCKUP is not set
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# CONFIG_SCHED_DEBUG is not set
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# CONFIG_DEBUG_BUGVERBOSE is not set
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CONFIG_DEBUG_USER=y
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CONFIG_DEBUG_LL=y
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# CONFIG_CRYPTO_ANSI_CPRNG is not set
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# CONFIG_CRYPTO_HW is not set
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@ -1,178 +0,0 @@
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# CONFIG_LOCALVERSION_AUTO is not set
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CONFIG_SYSVIPC=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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# CONFIG_VM_EVENT_COUNTERS is not set
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# CONFIG_SLUB_DEBUG is not set
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# CONFIG_COMPAT_BRK is not set
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_PXA=y
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CONFIG_MACH_EM_X270=y
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CONFIG_MACH_EXEDA=y
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CONFIG_NO_HZ=y
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CONFIG_AEABI=y
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CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_CMDLINE="root=1f03 mem=32M"
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=m
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CONFIG_FPE_NWFPE=y
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CONFIG_PM=y
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CONFIG_APM_EMULATION=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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# CONFIG_INET_DIAG is not set
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# CONFIG_IPV6 is not set
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CONFIG_BT=m
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CONFIG_BT_RFCOMM=m
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CONFIG_BT_BNEP=m
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CONFIG_BT_HIDP=m
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CONFIG_BT_HCIBTUSB=m
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CONFIG_LIB80211=m
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CONFIG_FW_LOADER=m
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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CONFIG_MTD_CFI_INTELEXT=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_CFI_STAA=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_PXA2XX=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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# CONFIG_SCSI_LOWLEVEL is not set
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CONFIG_NETDEVICES=y
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CONFIG_NET_ETHERNET=y
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CONFIG_DM9000=y
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CONFIG_DM9000_DEBUGLEVEL=1
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CONFIG_PPP=m
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CONFIG_PPP_MULTILINK=y
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CONFIG_PPP_FILTER=y
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CONFIG_PPP_ASYNC=m
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CONFIG_PPP_DEFLATE=m
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CONFIG_PPP_BSDCOMP=m
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CONFIG_INPUT_EVDEV=y
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CONFIG_INPUT_APMPOWER=y
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CONFIG_KEYBOARD_GPIO=y
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CONFIG_KEYBOARD_PXA27x=y
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# CONFIG_INPUT_MOUSE is not set
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CONFIG_INPUT_TOUCHSCREEN=y
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# CONFIG_TOUCHSCREEN_DA9034 is not set
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CONFIG_TOUCHSCREEN_WM97XX=m
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# CONFIG_TOUCHSCREEN_WM9705 is not set
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# CONFIG_TOUCHSCREEN_WM9713 is not set
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# CONFIG_SERIO_SERPORT is not set
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CONFIG_SERIAL_PXA=y
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CONFIG_SERIAL_PXA_CONSOLE=y
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CONFIG_LEGACY_PTY_COUNT=16
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=m
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CONFIG_I2C_PXA=y
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CONFIG_SPI=y
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CONFIG_SPI_PXA2XX=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_BATTERY_DA9030=y
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# CONFIG_HWMON is not set
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CONFIG_PMIC_DA903X=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_DA903X=y
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CONFIG_FB=y
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CONFIG_FB_PXA=y
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CONFIG_FB_PXA_PARAMETERS=y
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CONFIG_FB_MBX=m
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CONFIG_LCD_CLASS_DEVICE=y
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CONFIG_LCD_TDO24M=y
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# CONFIG_BACKLIGHT_GENERIC is not set
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CONFIG_BACKLIGHT_DA903X=m
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# CONFIG_VGA_CONSOLE is not set
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_LOGO=y
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CONFIG_SOUND=m
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CONFIG_SND=m
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CONFIG_SND_MIXER_OSS=m
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CONFIG_SND_PCM_OSS=m
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# CONFIG_SND_DRIVERS is not set
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# CONFIG_SND_SPI is not set
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# CONFIG_SND_USB is not set
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CONFIG_SND_SOC=m
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CONFIG_SND_PXA2XX_SOC=m
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CONFIG_SND_PXA2XX_SOC_EM_X270=m
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CONFIG_HID_A4TECH=y
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CONFIG_HID_APPLE=y
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CONFIG_HID_BELKIN=y
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CONFIG_HID_CHERRY=y
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CONFIG_HID_CHICONY=y
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CONFIG_HID_CYPRESS=y
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CONFIG_HID_EZKEY=y
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CONFIG_HID_GYRATION=y
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CONFIG_HID_LOGITECH=y
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CONFIG_HID_MICROSOFT=y
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CONFIG_HID_MONTEREY=y
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CONFIG_HID_PANTHERLORD=y
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CONFIG_HID_PETALYNX=y
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CONFIG_HID_SAMSUNG=y
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CONFIG_HID_SONY=y
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CONFIG_HID_SUNPLUS=y
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CONFIG_USB=y
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CONFIG_USB_MON=y
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CONFIG_USB_OHCI_HCD=y
|
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CONFIG_USB_STORAGE=y
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CONFIG_MMC=m
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CONFIG_MMC_PXA=m
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CONFIG_NEW_LEDS=y
|
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CONFIG_LEDS_CLASS=y
|
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CONFIG_LEDS_DA903X=y
|
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CONFIG_LEDS_TRIGGERS=y
|
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CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_V3020=y
|
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CONFIG_RTC_DRV_PXA=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
|
||||
CONFIG_VFAT_FS=m
|
||||
# CONFIG_PROC_PAGE_MONITOR is not set
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_SUMMARY=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_NLS_UTF8=m
|
||||
CONFIG_FRAME_WARN=0
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DETECT_SOFTLOCKUP is not set
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_AES=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
|
|
@ -38,8 +38,6 @@ CONFIG_MACH_ARCOM_ZEUS=y
|
|||
CONFIG_MACH_BALLOON3=y
|
||||
CONFIG_MACH_CSB726=y
|
||||
CONFIG_CSB726_CSB701=y
|
||||
CONFIG_MACH_ARMCORE=y
|
||||
CONFIG_MACH_EM_X270=y
|
||||
CONFIG_MACH_EXEDA=y
|
||||
CONFIG_MACH_CM_X300=y
|
||||
CONFIG_MACH_CAPC7117=y
|
||||
|
|
|
|||
|
|
@ -123,23 +123,6 @@ config CSB726_CSB701
|
|||
bool "Enable support for CSB701 baseboard"
|
||||
depends on MACH_CSB726
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||||
|
||||
config MACH_ARMCORE
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bool "CompuLab CM-X255/CM-X270 modules"
|
||||
select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
|
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select IWMMXT
|
||||
select HAVE_PCI
|
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select NEED_MACH_IO_H if PCI
|
||||
select PXA25x
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select PXA27x
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||||
|
||||
config MACH_EM_X270
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bool "CompuLab EM-x270 platform"
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select PXA27x
|
||||
|
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config MACH_EXEDA
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bool "CompuLab eXeda platform"
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select PXA27x
|
||||
|
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config MACH_CM_X300
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bool "CompuLab CM-X300 modules"
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select CPU_PXA300
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||||
|
|
|
|||
|
|
@ -40,11 +40,6 @@ obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o
|
|||
obj-$(CONFIG_MACH_BALLOON3) += balloon3.o
|
||||
obj-$(CONFIG_MACH_CSB726) += csb726.o
|
||||
obj-$(CONFIG_CSB726_CSB701) += csb701.o
|
||||
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
|
||||
ifeq ($(CONFIG_PCI),y)
|
||||
obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
|
||||
endif
|
||||
obj-$(CONFIG_MACH_EM_X270) += em-x270.o
|
||||
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
|
||||
obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
|
||||
obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
|
||||
|
|
|
|||
|
|
@ -1,240 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* linux/arch/arm/mach-pxa/cm-x255.c
|
||||
*
|
||||
* Copyright (C) 2007, 2008 CompuLab, Ltd.
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mtd/nand-gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/pxa2xx_spi.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "pxa25x.h"
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
#define GPIO_NAND_CS (5)
|
||||
#define GPIO_NAND_ALE (4)
|
||||
#define GPIO_NAND_CLE (3)
|
||||
#define GPIO_NAND_RB (10)
|
||||
|
||||
static unsigned long cmx255_pin_config[] = {
|
||||
/* AC'97 */
|
||||
GPIO28_AC97_BITCLK,
|
||||
GPIO29_AC97_SDATA_IN_0,
|
||||
GPIO30_AC97_SDATA_OUT,
|
||||
GPIO31_AC97_SYNC,
|
||||
|
||||
/* BTUART */
|
||||
GPIO42_BTUART_RXD,
|
||||
GPIO43_BTUART_TXD,
|
||||
GPIO44_BTUART_CTS,
|
||||
GPIO45_BTUART_RTS,
|
||||
|
||||
/* STUART */
|
||||
GPIO46_STUART_RXD,
|
||||
GPIO47_STUART_TXD,
|
||||
|
||||
/* LCD */
|
||||
GPIOxx_LCD_TFT_16BPP,
|
||||
|
||||
/* SSP1 */
|
||||
GPIO23_SSP1_SCLK,
|
||||
GPIO24_SSP1_SFRM,
|
||||
GPIO25_SSP1_TXD,
|
||||
GPIO26_SSP1_RXD,
|
||||
|
||||
/* SSP2 */
|
||||
GPIO81_SSP2_CLK_OUT,
|
||||
GPIO82_SSP2_FRM_OUT,
|
||||
GPIO83_SSP2_TXD,
|
||||
GPIO84_SSP2_RXD,
|
||||
|
||||
/* PC Card */
|
||||
GPIO48_nPOE,
|
||||
GPIO49_nPWE,
|
||||
GPIO50_nPIOR,
|
||||
GPIO51_nPIOW,
|
||||
GPIO52_nPCE_1,
|
||||
GPIO53_nPCE_2,
|
||||
GPIO54_nPSKTSEL,
|
||||
GPIO55_nPREG,
|
||||
GPIO56_nPWAIT,
|
||||
GPIO57_nIOIS16,
|
||||
|
||||
/* SDRAM and local bus */
|
||||
GPIO15_nCS_1,
|
||||
GPIO78_nCS_2,
|
||||
GPIO79_nCS_3,
|
||||
GPIO80_nCS_4,
|
||||
GPIO33_nCS_5,
|
||||
GPIO18_RDY,
|
||||
|
||||
/* GPIO */
|
||||
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
|
||||
GPIO9_GPIO, /* PC card reset */
|
||||
|
||||
/* NAND controls */
|
||||
GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
|
||||
GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
|
||||
GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
|
||||
GPIO10_GPIO, /* NAND Ready/Busy */
|
||||
|
||||
/* interrupts */
|
||||
GPIO22_GPIO, /* DM9000 interrupt */
|
||||
};
|
||||
|
||||
#if defined(CONFIG_SPI_PXA2XX)
|
||||
static struct pxa2xx_spi_controller pxa_ssp_master_info = {
|
||||
.num_chipselect = 1,
|
||||
};
|
||||
|
||||
static struct spi_board_info spi_board_info[] __initdata = {
|
||||
[0] = {
|
||||
.modalias = "rtc-max6902",
|
||||
.max_speed_hz = 1000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx255_init_rtc(void)
|
||||
{
|
||||
pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
|
||||
spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
|
||||
}
|
||||
#else
|
||||
static inline void cmx255_init_rtc(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
static struct mtd_partition cmx255_nor_partitions[] = {
|
||||
{
|
||||
.name = "ARMmon",
|
||||
.size = 0x00030000,
|
||||
.offset = 0,
|
||||
.mask_flags = MTD_WRITEABLE /* force read-only */
|
||||
} , {
|
||||
.name = "ARMmon setup block",
|
||||
.size = 0x00010000,
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.mask_flags = MTD_WRITEABLE /* force read-only */
|
||||
} , {
|
||||
.name = "kernel",
|
||||
.size = 0x00160000,
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
} , {
|
||||
.name = "ramdisk",
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.offset = MTDPART_OFS_APPEND
|
||||
}
|
||||
};
|
||||
|
||||
static struct physmap_flash_data cmx255_nor_flash_data[] = {
|
||||
{
|
||||
.width = 2, /* bankwidth in bytes */
|
||||
.parts = cmx255_nor_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource cmx255_nor_resource = {
|
||||
.start = PXA_CS0_PHYS,
|
||||
.end = PXA_CS0_PHYS + SZ_8M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device cmx255_nor = {
|
||||
.name = "physmap-flash",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = cmx255_nor_flash_data,
|
||||
},
|
||||
.resource = &cmx255_nor_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
static void __init cmx255_init_nor(void)
|
||||
{
|
||||
platform_device_register(&cmx255_nor);
|
||||
}
|
||||
#else
|
||||
static inline void cmx255_init_nor(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
|
||||
|
||||
static struct gpiod_lookup_table cmx255_nand_gpiod_table = {
|
||||
.dev_id = "gpio-nand",
|
||||
.table = {
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH),
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH),
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource cmx255_nand_resource[] = {
|
||||
[0] = {
|
||||
.start = PXA_CS1_PHYS,
|
||||
.end = PXA_CS1_PHYS + 11,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = PXA_CS5_PHYS,
|
||||
.end = PXA_CS5_PHYS + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition cmx255_nand_parts[] = {
|
||||
[0] = {
|
||||
.name = "cmx255-nand",
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.offset = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_nand_platdata cmx255_nand_platdata = {
|
||||
.parts = cmx255_nand_parts,
|
||||
.num_parts = ARRAY_SIZE(cmx255_nand_parts),
|
||||
.chip_delay = 25,
|
||||
};
|
||||
|
||||
static struct platform_device cmx255_nand = {
|
||||
.name = "gpio-nand",
|
||||
.num_resources = ARRAY_SIZE(cmx255_nand_resource),
|
||||
.resource = cmx255_nand_resource,
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &cmx255_nand_platdata,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init cmx255_init_nand(void)
|
||||
{
|
||||
gpiod_add_lookup_table(&cmx255_nand_gpiod_table);
|
||||
platform_device_register(&cmx255_nand);
|
||||
}
|
||||
#else
|
||||
static inline void cmx255_init_nand(void) {}
|
||||
#endif
|
||||
|
||||
void __init cmx255_init(void)
|
||||
{
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
|
||||
|
||||
cmx255_init_rtc();
|
||||
cmx255_init_nor();
|
||||
cmx255_init_nand();
|
||||
}
|
||||
|
|
@ -1,419 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* linux/arch/arm/mach-pxa/cm-x270.c
|
||||
*
|
||||
* Copyright (C) 2007, 2008 CompuLab, Ltd.
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <linux/platform_data/rtc-v3020.h>
|
||||
#include <video/mbxfb.h>
|
||||
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/pxa2xx_spi.h>
|
||||
#include <linux/spi/libertas_spi.h>
|
||||
|
||||
#include "pxa27x.h"
|
||||
#include <linux/platform_data/usb-ohci-pxa27x.h>
|
||||
#include <linux/platform_data/mmc-pxamci.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
/* physical address if local-bus attached devices */
|
||||
#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
|
||||
|
||||
/* GPIO IRQ usage */
|
||||
#define GPIO83_MMC_IRQ (83)
|
||||
|
||||
#define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
|
||||
|
||||
/* MMC power enable */
|
||||
#define GPIO105_MMC_POWER (105)
|
||||
|
||||
/* WLAN GPIOS */
|
||||
#define GPIO19_WLAN_STRAP (19)
|
||||
#define GPIO102_WLAN_RST (102)
|
||||
|
||||
static unsigned long cmx270_pin_config[] = {
|
||||
/* AC'97 */
|
||||
GPIO28_AC97_BITCLK,
|
||||
GPIO29_AC97_SDATA_IN_0,
|
||||
GPIO30_AC97_SDATA_OUT,
|
||||
GPIO31_AC97_SYNC,
|
||||
GPIO98_AC97_SYSCLK,
|
||||
GPIO113_AC97_nRESET,
|
||||
|
||||
/* BTUART */
|
||||
GPIO42_BTUART_RXD,
|
||||
GPIO43_BTUART_TXD,
|
||||
GPIO44_BTUART_CTS,
|
||||
GPIO45_BTUART_RTS,
|
||||
|
||||
/* STUART */
|
||||
GPIO46_STUART_RXD,
|
||||
GPIO47_STUART_TXD,
|
||||
|
||||
/* MCI controller */
|
||||
GPIO32_MMC_CLK,
|
||||
GPIO112_MMC_CMD,
|
||||
GPIO92_MMC_DAT_0,
|
||||
GPIO109_MMC_DAT_1,
|
||||
GPIO110_MMC_DAT_2,
|
||||
GPIO111_MMC_DAT_3,
|
||||
|
||||
/* LCD */
|
||||
GPIOxx_LCD_TFT_16BPP,
|
||||
|
||||
/* I2C */
|
||||
GPIO117_I2C_SCL,
|
||||
GPIO118_I2C_SDA,
|
||||
|
||||
/* SSP1 */
|
||||
GPIO23_SSP1_SCLK,
|
||||
GPIO24_SSP1_SFRM,
|
||||
GPIO25_SSP1_TXD,
|
||||
GPIO26_SSP1_RXD,
|
||||
|
||||
/* SSP2 */
|
||||
GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */
|
||||
GPIO14_GPIO,
|
||||
GPIO87_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
|
||||
/* PC Card */
|
||||
GPIO48_nPOE,
|
||||
GPIO49_nPWE,
|
||||
GPIO50_nPIOR,
|
||||
GPIO51_nPIOW,
|
||||
GPIO85_nPCE_1,
|
||||
GPIO54_nPCE_2,
|
||||
GPIO55_nPREG,
|
||||
GPIO56_nPWAIT,
|
||||
GPIO57_nIOIS16,
|
||||
|
||||
/* SDRAM and local bus */
|
||||
GPIO15_nCS_1,
|
||||
GPIO78_nCS_2,
|
||||
GPIO79_nCS_3,
|
||||
GPIO80_nCS_4,
|
||||
GPIO33_nCS_5,
|
||||
GPIO49_nPWE,
|
||||
GPIO18_RDY,
|
||||
|
||||
/* GPIO */
|
||||
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
|
||||
GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
|
||||
GPIO53_GPIO, /* PC card reset */
|
||||
GPIO102_GPIO, /* WLAN reset */
|
||||
|
||||
/* NAND controls */
|
||||
GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
|
||||
GPIO89_GPIO, /* NAND Ready/Busy */
|
||||
|
||||
/* interrupts */
|
||||
GPIO10_GPIO, /* DM9000 interrupt */
|
||||
GPIO83_GPIO, /* MMC card detect */
|
||||
GPIO95_GPIO, /* WLAN interrupt */
|
||||
};
|
||||
|
||||
/* V3020 RTC */
|
||||
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
|
||||
static struct resource cmx270_v3020_resource[] = {
|
||||
[0] = {
|
||||
.start = RTC_PHYS_BASE,
|
||||
.end = RTC_PHYS_BASE + 4,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
struct v3020_platform_data cmx270_v3020_pdata = {
|
||||
.leftshift = 16,
|
||||
};
|
||||
|
||||
static struct platform_device cmx270_rtc_device = {
|
||||
.name = "v3020",
|
||||
.num_resources = ARRAY_SIZE(cmx270_v3020_resource),
|
||||
.resource = cmx270_v3020_resource,
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &cmx270_v3020_pdata,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init cmx270_init_rtc(void)
|
||||
{
|
||||
platform_device_register(&cmx270_rtc_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_rtc(void) {}
|
||||
#endif
|
||||
|
||||
/* 2700G graphics */
|
||||
#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
|
||||
static u64 fb_dma_mask = ~(u64)0;
|
||||
|
||||
static struct resource cmx270_2700G_resource[] = {
|
||||
/* frame buffer memory including ODFB and External SDRAM */
|
||||
[0] = {
|
||||
.start = PXA_CS2_PHYS,
|
||||
.end = PXA_CS2_PHYS + 0x01ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
/* Marathon registers */
|
||||
[1] = {
|
||||
.start = PXA_CS2_PHYS + 0x03fe0000,
|
||||
.end = PXA_CS2_PHYS + 0x03ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static unsigned long cmx270_marathon_on[] = {
|
||||
GPIO58_GPIO,
|
||||
GPIO59_GPIO,
|
||||
GPIO60_GPIO,
|
||||
GPIO61_GPIO,
|
||||
GPIO62_GPIO,
|
||||
GPIO63_GPIO,
|
||||
GPIO64_GPIO,
|
||||
GPIO65_GPIO,
|
||||
GPIO66_GPIO,
|
||||
GPIO67_GPIO,
|
||||
GPIO68_GPIO,
|
||||
GPIO69_GPIO,
|
||||
GPIO70_GPIO,
|
||||
GPIO71_GPIO,
|
||||
GPIO72_GPIO,
|
||||
GPIO73_GPIO,
|
||||
GPIO74_GPIO,
|
||||
GPIO75_GPIO,
|
||||
GPIO76_GPIO,
|
||||
GPIO77_GPIO,
|
||||
};
|
||||
|
||||
static unsigned long cmx270_marathon_off[] = {
|
||||
GPIOxx_LCD_TFT_16BPP,
|
||||
};
|
||||
|
||||
static int cmx270_marathon_probe(struct fb_info *fb)
|
||||
{
|
||||
int gpio, err;
|
||||
|
||||
for (gpio = 58; gpio <= 77; gpio++) {
|
||||
err = gpio_request(gpio, "LCD");
|
||||
if (err)
|
||||
return err;
|
||||
gpio_direction_input(gpio);
|
||||
}
|
||||
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmx270_marathon_remove(struct fb_info *fb)
|
||||
{
|
||||
int gpio;
|
||||
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off));
|
||||
|
||||
for (gpio = 58; gpio <= 77; gpio++)
|
||||
gpio_free(gpio);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct mbxfb_platform_data cmx270_2700G_data = {
|
||||
.xres = {
|
||||
.min = 240,
|
||||
.max = 1200,
|
||||
.defval = 640,
|
||||
},
|
||||
.yres = {
|
||||
.min = 240,
|
||||
.max = 1200,
|
||||
.defval = 480,
|
||||
},
|
||||
.bpp = {
|
||||
.min = 16,
|
||||
.max = 32,
|
||||
.defval = 16,
|
||||
},
|
||||
.memsize = 8*1024*1024,
|
||||
.probe = cmx270_marathon_probe,
|
||||
.remove = cmx270_marathon_remove,
|
||||
};
|
||||
|
||||
static struct platform_device cmx270_2700G = {
|
||||
.name = "mbx-fb",
|
||||
.dev = {
|
||||
.platform_data = &cmx270_2700G_data,
|
||||
.dma_mask = &fb_dma_mask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(cmx270_2700G_resource),
|
||||
.resource = cmx270_2700G_resource,
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static void __init cmx270_init_2700G(void)
|
||||
{
|
||||
platform_device_register(&cmx270_2700G);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_2700G(void) {}
|
||||
#endif
|
||||
|
||||
/* PXA27x OHCI controller setup */
|
||||
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
||||
static struct pxaohci_platform_data cmx270_ohci_platform_data = {
|
||||
.port_mode = PMM_PERPORT_MODE,
|
||||
.flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
|
||||
};
|
||||
|
||||
static void __init cmx270_init_ohci(void)
|
||||
{
|
||||
pxa_set_ohci_info(&cmx270_ohci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_ohci(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
|
||||
static struct pxamci_platform_data cmx270_mci_platform_data = {
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
};
|
||||
|
||||
static struct gpiod_lookup_table cmx270_mci_gpio_table = {
|
||||
.dev_id = "pxa2xx-mci.0",
|
||||
.table = {
|
||||
/* Card detect on GPIO 83 */
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO83_MMC_IRQ, "cd", GPIO_ACTIVE_LOW),
|
||||
/* Power on GPIO 105 */
|
||||
GPIO_LOOKUP("gpio-pxa", GPIO105_MMC_POWER,
|
||||
"power", GPIO_ACTIVE_LOW),
|
||||
{ },
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx270_init_mmc(void)
|
||||
{
|
||||
gpiod_add_lookup_table(&cmx270_mci_gpio_table);
|
||||
pxa_set_mci_info(&cmx270_mci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_mmc(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
|
||||
static struct pxa2xx_spi_controller cm_x270_spi_info = {
|
||||
.num_chipselect = 1,
|
||||
.enable_dma = 1,
|
||||
};
|
||||
|
||||
static struct pxa2xx_spi_chip cm_x270_libertas_chip = {
|
||||
.rx_threshold = 1,
|
||||
.tx_threshold = 1,
|
||||
.timeout = 1000,
|
||||
.gpio_cs = 14,
|
||||
};
|
||||
|
||||
static unsigned long cm_x270_libertas_pin_config[] = {
|
||||
/* SSP2 */
|
||||
GPIO19_SSP2_SCLK,
|
||||
GPIO14_GPIO,
|
||||
GPIO87_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
|
||||
};
|
||||
|
||||
static int cm_x270_libertas_setup(struct spi_device *spi)
|
||||
{
|
||||
int err = gpio_request(GPIO19_WLAN_STRAP, "WLAN STRAP");
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = gpio_request(GPIO102_WLAN_RST, "WLAN RST");
|
||||
if (err)
|
||||
goto err_free_strap;
|
||||
|
||||
err = gpio_direction_output(GPIO102_WLAN_RST, 0);
|
||||
if (err)
|
||||
goto err_free_strap;
|
||||
msleep(100);
|
||||
|
||||
err = gpio_direction_output(GPIO19_WLAN_STRAP, 1);
|
||||
if (err)
|
||||
goto err_free_strap;
|
||||
msleep(100);
|
||||
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cm_x270_libertas_pin_config));
|
||||
|
||||
gpio_set_value(GPIO102_WLAN_RST, 1);
|
||||
msleep(100);
|
||||
|
||||
spi->bits_per_word = 16;
|
||||
spi_setup(spi);
|
||||
|
||||
return 0;
|
||||
|
||||
err_free_strap:
|
||||
gpio_free(GPIO19_WLAN_STRAP);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int cm_x270_libertas_teardown(struct spi_device *spi)
|
||||
{
|
||||
gpio_set_value(GPIO102_WLAN_RST, 0);
|
||||
gpio_free(GPIO102_WLAN_RST);
|
||||
gpio_free(GPIO19_WLAN_STRAP);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct libertas_spi_platform_data cm_x270_libertas_pdata = {
|
||||
.use_dummy_writes = 1,
|
||||
.setup = cm_x270_libertas_setup,
|
||||
.teardown = cm_x270_libertas_teardown,
|
||||
};
|
||||
|
||||
static struct spi_board_info cm_x270_spi_devices[] __initdata = {
|
||||
{
|
||||
.modalias = "libertas_spi",
|
||||
.max_speed_hz = 13000000,
|
||||
.bus_num = 2,
|
||||
.irq = PXA_GPIO_TO_IRQ(95),
|
||||
.chip_select = 0,
|
||||
.controller_data = &cm_x270_libertas_chip,
|
||||
.platform_data = &cm_x270_libertas_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx270_init_spi(void)
|
||||
{
|
||||
pxa2xx_set_spi_info(2, &cm_x270_spi_info);
|
||||
spi_register_board_info(ARRAY_AND_SIZE(cm_x270_spi_devices));
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_spi(void) {}
|
||||
#endif
|
||||
|
||||
void __init cmx270_init(void)
|
||||
{
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
|
||||
#endif
|
||||
|
||||
cmx270_init_rtc();
|
||||
cmx270_init_mmc();
|
||||
cmx270_init_ohci();
|
||||
cmx270_init_2700G();
|
||||
cmx270_init_spi();
|
||||
}
|
||||
|
|
@ -1,196 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* linux/arch/arm/mach-pxa/cm-x2xx-pci.c
|
||||
*
|
||||
* PCI bios-type initialisation for PCI machines
|
||||
*
|
||||
* Bits taken from various places.
|
||||
*
|
||||
* Copyright (C) 2007, 2008 Compulab, Ltd.
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/hardware/it8152.h>
|
||||
|
||||
void __iomem *it8152_base_address;
|
||||
static int cmx2xx_it8152_irq_gpio;
|
||||
|
||||
static void cmx2xx_it8152_irq_demux(struct irq_desc *desc)
|
||||
{
|
||||
/* clear our parent irq */
|
||||
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
||||
|
||||
it8152_irq_demux(desc);
|
||||
}
|
||||
|
||||
void __cmx2xx_pci_init_irq(int irq_gpio)
|
||||
{
|
||||
it8152_init_irq();
|
||||
|
||||
cmx2xx_it8152_irq_gpio = irq_gpio;
|
||||
|
||||
irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
|
||||
|
||||
irq_set_chained_handler(gpio_to_irq(irq_gpio),
|
||||
cmx2xx_it8152_irq_demux);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static unsigned long sleep_save_ite[10];
|
||||
|
||||
void __cmx2xx_pci_suspend(void)
|
||||
{
|
||||
/* save ITE state */
|
||||
sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
|
||||
sleep_save_ite[1] = __raw_readl(IT8152_INTC_LPCNIMR);
|
||||
sleep_save_ite[2] = __raw_readl(IT8152_INTC_LPNIAR);
|
||||
|
||||
/* Clear ITE IRQ's */
|
||||
__raw_writel((0), IT8152_INTC_PDCNIRR);
|
||||
__raw_writel((0), IT8152_INTC_LPCNIRR);
|
||||
}
|
||||
|
||||
void __cmx2xx_pci_resume(void)
|
||||
{
|
||||
/* restore IT8152 state */
|
||||
__raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
|
||||
__raw_writel((sleep_save_ite[1]), IT8152_INTC_LPCNIMR);
|
||||
__raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
|
||||
}
|
||||
#else
|
||||
void cmx2xx_pci_suspend(void) {}
|
||||
void cmx2xx_pci_resume(void) {}
|
||||
#endif
|
||||
|
||||
/* PCI IRQ mapping*/
|
||||
static int __init cmx2xx_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
||||
dev_dbg(&dev->dev, "%s: slot=%x, pin=%x\n", __func__, slot, pin);
|
||||
|
||||
irq = it8152_pci_map_irq(dev, slot, pin);
|
||||
if (irq)
|
||||
return irq;
|
||||
|
||||
/*
|
||||
Here comes the ugly part. The routing is baseboard specific,
|
||||
but defining a platform for each possible base of CM-X2XX is
|
||||
unrealistic. Here we keep mapping for ATXBase and SB-X2XX.
|
||||
*/
|
||||
/* ATXBASE PCI slot */
|
||||
if (slot == 7)
|
||||
return IT8152_PCI_INTA;
|
||||
|
||||
/* ATXBase/SB-X2XX CardBus */
|
||||
if (slot == 8 || slot == 0)
|
||||
return IT8152_PCI_INTB;
|
||||
|
||||
/* ATXBase Ethernet */
|
||||
if (slot == 9)
|
||||
return IT8152_PCI_INTA;
|
||||
|
||||
/* CM-x255 Onboard Ethernet */
|
||||
if (slot == 15)
|
||||
return IT8152_PCI_INTC;
|
||||
|
||||
/* SB-x2xx Ethernet */
|
||||
if (slot == 16)
|
||||
return IT8152_PCI_INTA;
|
||||
|
||||
/* PC104+ interrupt routing */
|
||||
if ((slot == 17) || (slot == 19))
|
||||
return IT8152_PCI_INTA;
|
||||
if ((slot == 18) || (slot == 20))
|
||||
return IT8152_PCI_INTB;
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
static void cmx2xx_pci_preinit(void)
|
||||
{
|
||||
pr_info("Initializing CM-X2XX PCI subsystem\n");
|
||||
|
||||
pcibios_min_io = 0;
|
||||
pcibios_min_mem = 0;
|
||||
|
||||
__raw_writel(0x800, IT8152_PCI_CFG_ADDR);
|
||||
if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
|
||||
pr_info("PCI Bridge found.\n");
|
||||
|
||||
/* set PCI I/O base at 0 */
|
||||
writel(0x848, IT8152_PCI_CFG_ADDR);
|
||||
writel(0, IT8152_PCI_CFG_DATA);
|
||||
|
||||
/* set PCI memory base at 0 */
|
||||
writel(0x840, IT8152_PCI_CFG_ADDR);
|
||||
writel(0, IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x20, IT8152_GPIO_GPDR);
|
||||
|
||||
/* CardBus Controller on ATXbase baseboard */
|
||||
writel(0x4000, IT8152_PCI_CFG_ADDR);
|
||||
if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) {
|
||||
pr_info("CardBus Bridge found.\n");
|
||||
|
||||
/* Configure socket 0 */
|
||||
writel(0x408C, IT8152_PCI_CFG_ADDR);
|
||||
writel(0x1022, IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4080, IT8152_PCI_CFG_ADDR);
|
||||
writel(0x3844d060, IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4090, IT8152_PCI_CFG_ADDR);
|
||||
writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
|
||||
0x60440000),
|
||||
IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4018, IT8152_PCI_CFG_ADDR);
|
||||
writel(0xb0000000, IT8152_PCI_CFG_DATA);
|
||||
|
||||
/* Configure socket 1 */
|
||||
writel(0x418C, IT8152_PCI_CFG_ADDR);
|
||||
writel(0x1022, IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4180, IT8152_PCI_CFG_ADDR);
|
||||
writel(0x3844d060, IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4190, IT8152_PCI_CFG_ADDR);
|
||||
writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
|
||||
0x60440000),
|
||||
IT8152_PCI_CFG_DATA);
|
||||
|
||||
writel(0x4118, IT8152_PCI_CFG_ADDR);
|
||||
writel(0xb0000000, IT8152_PCI_CFG_DATA);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static struct hw_pci cmx2xx_pci __initdata = {
|
||||
.map_irq = cmx2xx_pci_map_irq,
|
||||
.nr_controllers = 1,
|
||||
.ops = &it8152_ops,
|
||||
.setup = it8152_pci_setup,
|
||||
.preinit = cmx2xx_pci_preinit,
|
||||
};
|
||||
|
||||
static int __init cmx2xx_init_pci(void)
|
||||
{
|
||||
if (machine_is_armcore())
|
||||
pci_common_init(&cmx2xx_pci);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(cmx2xx_init_pci);
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
extern void __cmx2xx_pci_init_irq(int irq_gpio);
|
||||
extern void __cmx2xx_pci_suspend(void);
|
||||
extern void __cmx2xx_pci_resume(void);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
#define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x)
|
||||
#define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x)
|
||||
#define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x)
|
||||
#else
|
||||
#define cmx2xx_pci_init_irq(x) do {} while (0)
|
||||
#define cmx2xx_pci_suspend(x) do {} while (0)
|
||||
#define cmx2xx_pci_resume(x) do {} while (0)
|
||||
#endif
|
||||
|
|
@ -1,538 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* linux/arch/arm/mach-pxa/cm-x2xx.c
|
||||
*
|
||||
* Copyright (C) 2008 CompuLab, Ltd.
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/syscore_ops.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <linux/dm9000.h>
|
||||
#include <linux/leds.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "pxa25x.h"
|
||||
#undef GPIO24_SSP1_SFRM
|
||||
#undef GPIO86_GPIO
|
||||
#undef GPIO87_GPIO
|
||||
#undef GPIO88_GPIO
|
||||
#undef GPIO89_GPIO
|
||||
#include "pxa27x.h"
|
||||
#undef GPIO24_SSP1_SFRM
|
||||
#undef GPIO86_GPIO
|
||||
#undef GPIO87_GPIO
|
||||
#undef GPIO88_GPIO
|
||||
#undef GPIO89_GPIO
|
||||
#include <mach/audio.h>
|
||||
#include <linux/platform_data/video-pxafb.h>
|
||||
#include <mach/smemc.h>
|
||||
|
||||
#include <asm/hardware/it8152.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include "cm-x2xx-pci.h"
|
||||
|
||||
extern void cmx255_init(void);
|
||||
extern void cmx270_init(void);
|
||||
|
||||
/* reserve IRQs for IT8152 */
|
||||
#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
|
||||
|
||||
/* virtual addresses for statically mapped regions */
|
||||
#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
|
||||
#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
|
||||
|
||||
/* physical address if local-bus attached devices */
|
||||
#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
|
||||
#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
|
||||
|
||||
/* leds */
|
||||
#define CMX255_GPIO_RED (27)
|
||||
#define CMX255_GPIO_GREEN (32)
|
||||
#define CMX270_GPIO_RED (93)
|
||||
#define CMX270_GPIO_GREEN (94)
|
||||
|
||||
/* GPIO IRQ usage */
|
||||
#define GPIO22_ETHIRQ (22)
|
||||
#define GPIO10_ETHIRQ (10)
|
||||
#define CMX255_GPIO_IT8152_IRQ (0)
|
||||
#define CMX270_GPIO_IT8152_IRQ (22)
|
||||
|
||||
#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
|
||||
#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
|
||||
|
||||
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
|
||||
static struct resource cmx255_dm9000_resource[] = {
|
||||
[0] = {
|
||||
.start = CMX255_DM9000_PHYS_BASE,
|
||||
.end = CMX255_DM9000_PHYS_BASE + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = CMX255_DM9000_PHYS_BASE + 4,
|
||||
.end = CMX255_DM9000_PHYS_BASE + 4 + 500,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = CMX255_ETHIRQ,
|
||||
.end = CMX255_ETHIRQ,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource cmx270_dm9000_resource[] = {
|
||||
[0] = {
|
||||
.start = CMX270_DM9000_PHYS_BASE,
|
||||
.end = CMX270_DM9000_PHYS_BASE + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = CMX270_DM9000_PHYS_BASE + 8,
|
||||
.end = CMX270_DM9000_PHYS_BASE + 8 + 500,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = CMX270_ETHIRQ,
|
||||
.end = CMX270_ETHIRQ,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
|
||||
}
|
||||
};
|
||||
|
||||
static struct dm9000_plat_data cmx270_dm9000_platdata = {
|
||||
.flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
|
||||
};
|
||||
|
||||
static struct platform_device cmx2xx_dm9000_device = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
|
||||
.dev = {
|
||||
.platform_data = &cmx270_dm9000_platdata,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init cmx2xx_init_dm9000(void)
|
||||
{
|
||||
if (cpu_is_pxa25x())
|
||||
cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
|
||||
else
|
||||
cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
|
||||
platform_device_register(&cmx2xx_dm9000_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx2xx_init_dm9000(void) {}
|
||||
#endif
|
||||
|
||||
/* UCB1400 touchscreen controller */
|
||||
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
|
||||
static struct platform_device cmx2xx_ts_device = {
|
||||
.name = "ucb1400_core",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static void __init cmx2xx_init_touchscreen(void)
|
||||
{
|
||||
platform_device_register(&cmx2xx_ts_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx2xx_init_touchscreen(void) {}
|
||||
#endif
|
||||
|
||||
/* CM-X270 LEDs */
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
static struct gpio_led cmx2xx_leds[] = {
|
||||
[0] = {
|
||||
.name = "cm-x2xx:red",
|
||||
.default_trigger = "nand-disk",
|
||||
.active_low = 1,
|
||||
},
|
||||
[1] = {
|
||||
.name = "cm-x2xx:green",
|
||||
.default_trigger = "heartbeat",
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
|
||||
.num_leds = ARRAY_SIZE(cmx2xx_leds),
|
||||
.leds = cmx2xx_leds,
|
||||
};
|
||||
|
||||
static struct platform_device cmx2xx_led_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &cmx2xx_gpio_led_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx2xx_init_leds(void)
|
||||
{
|
||||
if (cpu_is_pxa25x()) {
|
||||
cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
|
||||
cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
|
||||
} else {
|
||||
cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
|
||||
cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
|
||||
}
|
||||
platform_device_register(&cmx2xx_led_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx2xx_init_leds(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
|
||||
/*
|
||||
Display definitions
|
||||
keep these for backwards compatibility, although symbolic names (as
|
||||
e.g. in lpd270.c) looks better
|
||||
*/
|
||||
#define MTYPE_STN320x240 0
|
||||
#define MTYPE_TFT640x480 1
|
||||
#define MTYPE_CRT640x480 2
|
||||
#define MTYPE_CRT800x600 3
|
||||
#define MTYPE_TFT320x240 6
|
||||
#define MTYPE_STN640x480 7
|
||||
|
||||
static struct pxafb_mode_info generic_stn_320x240_mode = {
|
||||
.pixclock = 76923,
|
||||
.bpp = 8,
|
||||
.xres = 320,
|
||||
.yres = 240,
|
||||
.hsync_len = 3,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 3,
|
||||
.upper_margin = 0,
|
||||
.right_margin = 3,
|
||||
.lower_margin = 0,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_stn_320x240 = {
|
||||
.modes = &generic_stn_320x240_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
|
||||
LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_tft_640x480_mode = {
|
||||
.pixclock = 38461,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 60,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 70,
|
||||
.upper_margin = 10,
|
||||
.right_margin = 70,
|
||||
.lower_margin = 5,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_tft_640x480 = {
|
||||
.modes = &generic_tft_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
|
||||
LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_crt_640x480_mode = {
|
||||
.pixclock = 38461,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 81,
|
||||
.upper_margin = 33,
|
||||
.right_margin = 16,
|
||||
.lower_margin = 10,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_crt_640x480 = {
|
||||
.modes = &generic_crt_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_crt_800x600_mode = {
|
||||
.pixclock = 28846,
|
||||
.bpp = 8,
|
||||
.xres = 800,
|
||||
.yres = 600,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 26,
|
||||
.upper_margin = 21,
|
||||
.right_margin = 26,
|
||||
.lower_margin = 11,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_crt_800x600 = {
|
||||
.modes = &generic_crt_800x600_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_tft_320x240_mode = {
|
||||
.pixclock = 134615,
|
||||
.bpp = 16,
|
||||
.xres = 320,
|
||||
.yres = 240,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 7,
|
||||
.left_margin = 75,
|
||||
.upper_margin = 0,
|
||||
.right_margin = 15,
|
||||
.lower_margin = 15,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_tft_320x240 = {
|
||||
.modes = &generic_tft_320x240_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_stn_640x480_mode = {
|
||||
.pixclock = 57692,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 4,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 10,
|
||||
.upper_margin = 5,
|
||||
.right_margin = 10,
|
||||
.lower_margin = 5,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_stn_640x480 = {
|
||||
.modes = &generic_stn_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
|
||||
|
||||
static int __init cmx2xx_set_display(char *str)
|
||||
{
|
||||
int disp_type = simple_strtol(str, NULL, 0);
|
||||
switch (disp_type) {
|
||||
case MTYPE_STN320x240:
|
||||
cmx2xx_display = &generic_stn_320x240;
|
||||
break;
|
||||
case MTYPE_TFT640x480:
|
||||
cmx2xx_display = &generic_tft_640x480;
|
||||
break;
|
||||
case MTYPE_CRT640x480:
|
||||
cmx2xx_display = &generic_crt_640x480;
|
||||
break;
|
||||
case MTYPE_CRT800x600:
|
||||
cmx2xx_display = &generic_crt_800x600;
|
||||
break;
|
||||
case MTYPE_TFT320x240:
|
||||
cmx2xx_display = &generic_tft_320x240;
|
||||
break;
|
||||
case MTYPE_STN640x480:
|
||||
cmx2xx_display = &generic_stn_640x480;
|
||||
break;
|
||||
default: /* fallback to CRT 640x480 */
|
||||
cmx2xx_display = &generic_crt_640x480;
|
||||
break;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
This should be done really early to get proper configuration for
|
||||
frame buffer.
|
||||
Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
|
||||
has limitied line length for kernel command line, and also it will
|
||||
break compatibitlty with proprietary releases already in field.
|
||||
*/
|
||||
__setup("monitor=", cmx2xx_set_display);
|
||||
|
||||
static void __init cmx2xx_init_display(void)
|
||||
{
|
||||
pxa_set_fb_info(NULL, cmx2xx_display);
|
||||
}
|
||||
#else
|
||||
static inline void cmx2xx_init_display(void) {}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static unsigned long sleep_save_msc[10];
|
||||
|
||||
static int cmx2xx_suspend(void)
|
||||
{
|
||||
cmx2xx_pci_suspend();
|
||||
|
||||
/* save MSC registers */
|
||||
sleep_save_msc[0] = __raw_readl(MSC0);
|
||||
sleep_save_msc[1] = __raw_readl(MSC1);
|
||||
sleep_save_msc[2] = __raw_readl(MSC2);
|
||||
|
||||
/* setup power saving mode registers */
|
||||
PCFR = 0x0;
|
||||
PSLR = 0xff400000;
|
||||
PMCR = 0x00000005;
|
||||
PWER = 0x80000000;
|
||||
PFER = 0x00000000;
|
||||
PRER = 0x00000000;
|
||||
PGSR0 = 0xC0018800;
|
||||
PGSR1 = 0x004F0002;
|
||||
PGSR2 = 0x6021C000;
|
||||
PGSR3 = 0x00020000;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void cmx2xx_resume(void)
|
||||
{
|
||||
cmx2xx_pci_resume();
|
||||
|
||||
/* restore MSC registers */
|
||||
__raw_writel(sleep_save_msc[0], MSC0);
|
||||
__raw_writel(sleep_save_msc[1], MSC1);
|
||||
__raw_writel(sleep_save_msc[2], MSC2);
|
||||
}
|
||||
|
||||
static struct syscore_ops cmx2xx_pm_syscore_ops = {
|
||||
.resume = cmx2xx_resume,
|
||||
.suspend = cmx2xx_suspend,
|
||||
};
|
||||
|
||||
static int __init cmx2xx_pm_init(void)
|
||||
{
|
||||
register_syscore_ops(&cmx2xx_pm_syscore_ops);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int __init cmx2xx_pm_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
|
||||
static void __init cmx2xx_init_ac97(void)
|
||||
{
|
||||
pxa_set_ac97_info(NULL);
|
||||
}
|
||||
#else
|
||||
static inline void cmx2xx_init_ac97(void) {}
|
||||
#endif
|
||||
|
||||
static void __init cmx2xx_init(void)
|
||||
{
|
||||
pxa_set_ffuart_info(NULL);
|
||||
pxa_set_btuart_info(NULL);
|
||||
pxa_set_stuart_info(NULL);
|
||||
|
||||
cmx2xx_pm_init();
|
||||
|
||||
if (cpu_is_pxa25x())
|
||||
cmx255_init();
|
||||
else
|
||||
cmx270_init();
|
||||
|
||||
cmx2xx_init_dm9000();
|
||||
cmx2xx_init_display();
|
||||
cmx2xx_init_ac97();
|
||||
cmx2xx_init_touchscreen();
|
||||
cmx2xx_init_leds();
|
||||
|
||||
regulator_has_full_constraints();
|
||||
}
|
||||
|
||||
static void __init cmx2xx_init_irq(void)
|
||||
{
|
||||
if (cpu_is_pxa25x()) {
|
||||
pxa25x_init_irq();
|
||||
cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
|
||||
} else {
|
||||
pxa27x_init_irq();
|
||||
cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* Map PCI companion statically */
|
||||
static struct map_desc cmx2xx_io_desc[] __initdata = {
|
||||
[0] = { /* PCI bridge */
|
||||
.virtual = (unsigned long)CMX2XX_IT8152_VIRT,
|
||||
.pfn = __phys_to_pfn(PXA_CS4_PHYS),
|
||||
.length = SZ_64M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx2xx_map_io(void)
|
||||
{
|
||||
if (cpu_is_pxa25x())
|
||||
pxa25x_map_io();
|
||||
|
||||
if (cpu_is_pxa27x())
|
||||
pxa27x_map_io();
|
||||
|
||||
iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
|
||||
|
||||
it8152_base_address = CMX2XX_IT8152_VIRT;
|
||||
}
|
||||
#else
|
||||
static void __init cmx2xx_map_io(void)
|
||||
{
|
||||
if (cpu_is_pxa25x())
|
||||
pxa25x_map_io();
|
||||
|
||||
if (cpu_is_pxa27x())
|
||||
pxa27x_map_io();
|
||||
}
|
||||
#endif
|
||||
|
||||
MACHINE_START(ARMCORE, "Compulab CM-X2XX")
|
||||
.atag_offset = 0x100,
|
||||
.map_io = cmx2xx_map_io,
|
||||
.nr_irqs = CMX2XX_NR_IRQS,
|
||||
.init_irq = cmx2xx_init_irq,
|
||||
/* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
|
||||
.handle_irq = pxa25x_handle_irq,
|
||||
.init_time = pxa_timer_init,
|
||||
.init_machine = cmx2xx_init,
|
||||
#ifdef CONFIG_PCI
|
||||
.dma_zone_size = SZ_64M,
|
||||
#endif
|
||||
.restart = pxa_restart,
|
||||
MACHINE_END
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,18 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* arch/arm/mach-pxa/include/mach/io.h
|
||||
*
|
||||
* Copied from asm/arch/sa1100/io.h
|
||||
*/
|
||||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
* We don't actually have real ISA nor PCI buses, but there is so many
|
||||
* drivers out there that might just work if we fake them...
|
||||
*/
|
||||
#define __io(a) __typesafe_io(a)
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue