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x86/iopl: Remove legacy IOPL option
The IOPL emulation via the I/O bitmap is sufficient. Remove the legacy cruft dealing with the (e)flags based IOPL mechanism. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Juergen Gross <jgross@suse.com> (Paravirt and Xen parts) Acked-by: Andy Lutomirski <luto@kernel.org>
This commit is contained in:
Thomas Gleixner
parent
c8137ace56
commit
a24ca99768
10 changed files with 17 additions and 119 deletions
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@ -1254,12 +1254,9 @@ config X86_VSYSCALL_EMULATION
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Disabling this option saves about 7K of kernel size and
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possibly 4K of additional runtime pagetable memory.
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choice
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prompt "IOPL"
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default X86_IOPL_EMULATION
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config X86_IOPL_EMULATION
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bool "IOPL Emulation"
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default y
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---help---
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Legacy IOPL support is an overbroad mechanism which allows user
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space aside of accessing all 65536 I/O ports also to disable
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@ -1269,22 +1266,8 @@ config X86_IOPL_EMULATION
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The emulation restricts the functionality of the syscall to
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only allowing the full range I/O port access, but prevents the
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ability to disable interrupts from user space.
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config X86_IOPL_LEGACY
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bool "IOPL Legacy"
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---help---
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Allow the full IOPL permissions, i.e. user space access to all
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65536 I/O ports and also the ability to disable interrupts, which
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is overbroad and can result in system lockups.
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config X86_IOPL_NONE
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bool "IOPL None"
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---help---
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Disable the IOPL permission syscall. That's the safest option as
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no sane application should depend on this functionality.
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endchoice
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ability to disable interrupts from user space which would be
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granted if the hardware IOPL mechanism would be used.
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config TOSHIBA
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tristate "Toshiba Laptop support"
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@ -294,10 +294,6 @@ static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
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{
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PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g);
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}
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static inline void set_iopl_mask(unsigned mask)
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{
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PVOP_VCALL1(cpu.set_iopl_mask, mask);
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}
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static inline void paravirt_activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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@ -140,8 +140,6 @@ struct pv_cpu_ops {
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void (*load_sp0)(unsigned long sp0);
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void (*set_iopl_mask)(unsigned mask);
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void (*wbinvd)(void);
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/* cpuid emulation, mostly so that caps bits can be disabled */
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@ -516,10 +516,10 @@ struct thread_struct {
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struct io_bitmap *io_bitmap;
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/*
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* IOPL. Priviledge level dependent I/O permission which includes
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* user space CLI/STI when granted.
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* IOPL. Priviledge level dependent I/O permission which is
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* emulated via the I/O bitmap to prevent user space from disabling
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* interrupts.
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*/
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unsigned long iopl;
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unsigned long iopl_emul;
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mm_segment_t addr_limit;
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@ -552,25 +552,6 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset,
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*/
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#define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/
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/*
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* Set IOPL bits in EFLAGS from given mask
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*/
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static inline void native_set_iopl_mask(unsigned mask)
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{
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#ifdef CONFIG_X86_32
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unsigned int reg;
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asm volatile ("pushfl;"
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"popl %0;"
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"andl %1, %0;"
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"orl %2, %0;"
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"pushl %0;"
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"popfl"
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: "=&r" (reg)
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: "i" (~X86_EFLAGS_IOPL), "r" (mask));
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#endif
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}
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static inline void
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native_load_sp0(unsigned long sp0)
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{
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@ -610,7 +591,6 @@ static inline void load_sp0(unsigned long sp0)
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native_load_sp0(sp0);
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}
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#define set_iopl_mask native_set_iopl_mask
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#endif /* CONFIG_PARAVIRT_XXL */
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/* Free all resources held by a thread. */
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@ -62,6 +62,4 @@ void xen_arch_register_cpu(int num);
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void xen_arch_unregister_cpu(int num);
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#endif
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extern void xen_set_iopl_mask(unsigned mask);
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#endif /* _ASM_X86_XEN_HYPERVISOR_H */
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@ -153,28 +153,23 @@ SYSCALL_DEFINE3(ioperm, unsigned long, from, unsigned long, num, int, turn_on)
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/*
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* The sys_iopl functionality depends on the level argument, which if
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* granted for the task is used by the CPU to check I/O instruction and
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* CLI/STI against the current priviledge level (CPL). If CPL is less than
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* or equal the tasks IOPL level the instructions take effect. If not a #GP
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* is raised. The default IOPL is 0, i.e. no permissions.
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* granted for the task is used to enable access to all 65536 I/O ports.
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*
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* Setting IOPL to level 0-2 is disabling the userspace access. Only level
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* 3 enables it. If set it allows the user space thread:
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* This does not use the IOPL mechanism provided by the CPU as that would
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* also allow the user space task to use the CLI/STI instructions.
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*
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* - Unrestricted access to all 65535 I/O ports
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* - The usage of CLI/STI instructions
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* Disabling interrupts in a user space task is dangerous as it might lock
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* up the machine and the semantics vs. syscalls and exceptions is
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* undefined.
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*
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* The advantage over ioperm is that the context switch does not require to
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* update the I/O bitmap which is especially true when a large number of
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* ports is accessed. But the allowance of CLI/STI in userspace is
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* considered a major problem.
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* Setting IOPL to level 0-2 is disabling I/O permissions. Level 3
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* 3 enables them.
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*
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* IOPL is strictly per thread and inherited on fork.
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*/
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SYSCALL_DEFINE1(iopl, unsigned int, level)
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{
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struct thread_struct *t = ¤t->thread;
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struct pt_regs *regs = current_pt_regs();
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unsigned int old;
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/*
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@ -187,10 +182,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
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if (level > 3)
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return -EINVAL;
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if (IS_ENABLED(CONFIG_X86_IOPL_EMULATION))
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old = t->iopl_emul;
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else
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old = t->iopl >> X86_EFLAGS_IOPL_BIT;
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old = t->iopl_emul;
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/* No point in going further if nothing changes */
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if (level == old)
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@ -203,25 +195,8 @@ SYSCALL_DEFINE1(iopl, unsigned int, level)
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return -EPERM;
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}
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if (IS_ENABLED(CONFIG_X86_IOPL_EMULATION)) {
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t->iopl_emul = level;
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task_update_io_bitmap();
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} else {
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/*
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* Change the flags value on the return stack, which has
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* been set up on system-call entry. See also the fork and
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* signal handling code how this is handled.
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*/
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regs->flags = (regs->flags & ~X86_EFLAGS_IOPL) |
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(level << X86_EFLAGS_IOPL_BIT);
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/* Store the new level in the thread struct */
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t->iopl = level << X86_EFLAGS_IOPL_BIT;
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/*
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* X86_32 switches immediately and XEN handles it via
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* emulation.
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*/
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set_iopl_mask(t->iopl);
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}
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t->iopl_emul = level;
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task_update_io_bitmap();
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return 0;
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}
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@ -341,8 +341,6 @@ struct paravirt_patch_template pv_ops = {
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.cpu.iret = native_iret,
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.cpu.swapgs = native_swapgs,
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.cpu.set_iopl_mask = native_set_iopl_mask,
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.cpu.start_context_switch = paravirt_nop,
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.cpu.end_context_switch = paravirt_nop,
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@ -187,15 +187,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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*/
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load_TLS(next, cpu);
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/*
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* Restore IOPL if needed. In normal use, the flags restore
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* in the switch assembly will handle this. But if the kernel
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* is running virtualized at a non-zero CPL, the popf will
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* not restore flags, so it must be done in a separate step.
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*/
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if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
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set_iopl_mask(next->iopl);
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switch_to_extra(prev_p, next_p);
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/*
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@ -497,17 +497,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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switch_to_extra(prev_p, next_p);
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#ifdef CONFIG_XEN_PV
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/*
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* On Xen PV, IOPL bits in pt_regs->flags have no effect, and
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* current_pt_regs()->flags may not match the current task's
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* intended IOPL. We need to switch it manually.
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*/
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if (unlikely(static_cpu_has(X86_FEATURE_XENPV) &&
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prev->iopl != next->iopl))
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xen_set_iopl_mask(next->iopl);
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#endif
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if (static_cpu_has_bug(X86_BUG_SYSRET_SS_ATTRS)) {
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/*
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* AMD CPUs have a misfeature: SYSRET sets the SS selector but
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@ -837,15 +837,6 @@ static void xen_load_sp0(unsigned long sp0)
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this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
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}
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void xen_set_iopl_mask(unsigned mask)
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{
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struct physdev_set_iopl set_iopl;
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/* Force the change at ring 0. */
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set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
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HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
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}
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static void xen_io_delay(void)
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{
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}
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@ -1055,7 +1046,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
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.write_idt_entry = xen_write_idt_entry,
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.load_sp0 = xen_load_sp0,
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.set_iopl_mask = xen_set_iopl_mask,
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.io_delay = xen_io_delay,
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/* Xen takes care of %gs when switching to usermode for us */
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