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	MIPS: Don't use RI/XI with 32-bit kernels on 64-bit CPUs
The TLB handlers cannot handle this case, so disable it for now. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com> Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7007/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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					 1 changed files with 8 additions and 1 deletions
				
			
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			@ -110,9 +110,15 @@
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#ifndef cpu_has_smartmips
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#define cpu_has_smartmips	(cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
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#endif
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#ifndef cpu_has_rixi
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#define cpu_has_rixi		(cpu_data[0].options & MIPS_CPU_RIXI)
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# ifdef CONFIG_64BIT
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# define cpu_has_rixi		(cpu_data[0].options & MIPS_CPU_RIXI)
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# else /* CONFIG_32BIT */
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# define cpu_has_rixi		((cpu_data[0].options & MIPS_CPU_RIXI) && !cpu_has_64bits)
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# endif
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#endif
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#ifndef cpu_has_mmips
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# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS
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#  define cpu_has_mmips		(cpu_data[0].options & MIPS_CPU_MICROMIPS)
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			@ -120,6 +126,7 @@
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#  define cpu_has_mmips		0
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# endif
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#endif
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#ifndef cpu_has_vtag_icache
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#define cpu_has_vtag_icache	(cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
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#endif
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