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drm/amdgpu: Remove unused code

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Remove unused code.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
YiPeng Chai 2024-07-11 16:27:08 +08:00 committed by Alex Deucher
parent 56631dee29
commit a7e8467fbe
4 changed files with 0 additions and 124 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

23
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
View file

@ -2881,9 +2881,6 @@ static void amdgpu_ras_ecc_log_init(struct ras_ecc_log_info *ecc_log)
{ {
mutex_init(&ecc_log->lock); mutex_init(&ecc_log->lock);
/* Set any value as siphash key */
memset(&ecc_log->ecc_key, 0xad, sizeof(ecc_log->ecc_key));
INIT_RADIX_TREE(&ecc_log->de_page_tree, GFP_KERNEL); INIT_RADIX_TREE(&ecc_log->de_page_tree, GFP_KERNEL);
ecc_log->de_queried_count = 0; ecc_log->de_queried_count = 0;
ecc_log->prev_de_queried_count = 0; ecc_log->prev_de_queried_count = 0;
@ -4611,8 +4608,6 @@ static struct ras_err_info *amdgpu_ras_error_get_info(struct ras_err_data *err_d
if (!err_node) if (!err_node)
return NULL; return NULL;
INIT_LIST_HEAD(&err_node->err_info.err_addr_list);
memcpy(&err_node->err_info.mcm_info, mcm_info, sizeof(*mcm_info)); memcpy(&err_node->err_info.mcm_info, mcm_info, sizeof(*mcm_info));
err_data->err_list_count++; err_data->err_list_count++;
@ -4622,18 +4617,6 @@ static struct ras_err_info *amdgpu_ras_error_get_info(struct ras_err_data *err_d
return &err_node->err_info; return &err_node->err_info;
} }
void amdgpu_ras_add_mca_err_addr(struct ras_err_info *err_info, struct ras_err_addr *err_addr)
{
/* This function will be retired. */
return;
}
void amdgpu_ras_del_mca_err_addr(struct ras_err_info *err_info, struct ras_err_addr *mca_err_addr)
{
list_del(&mca_err_addr->node);
kfree(mca_err_addr);
}
int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data, int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data,
struct amdgpu_smuio_mcm_config_info *mcm_info, struct amdgpu_smuio_mcm_config_info *mcm_info,
struct ras_err_addr *err_addr, u64 count) struct ras_err_addr *err_addr, u64 count)
@ -4650,9 +4633,6 @@ int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data,
if (!err_info) if (!err_info)
return -EINVAL; return -EINVAL;
if (err_addr && err_addr->err_status)
amdgpu_ras_add_mca_err_addr(err_info, err_addr);
err_info->ue_count += count; err_info->ue_count += count;
err_data->ue_count += count; err_data->ue_count += count;
@ -4697,9 +4677,6 @@ int amdgpu_ras_error_statistic_de_count(struct ras_err_data *err_data,
if (!err_info) if (!err_info)
return -EINVAL; return -EINVAL;
if (err_addr && err_addr->err_status)
amdgpu_ras_add_mca_err_addr(err_info, err_addr);
err_info->de_count += count; err_info->de_count += count;
err_data->de_count += count; err_data->de_count += count;

10
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
View file

@ -28,7 +28,6 @@
#include <linux/list.h> #include <linux/list.h>
#include <linux/kfifo.h> #include <linux/kfifo.h>
#include <linux/radix-tree.h> #include <linux/radix-tree.h>
#include <linux/siphash.h>
#include "ta_ras_if.h" #include "ta_ras_if.h"
#include "amdgpu_ras_eeprom.h" #include "amdgpu_ras_eeprom.h"
#include "amdgpu_smuio.h" #include "amdgpu_smuio.h"
@ -485,7 +484,6 @@ struct ras_ecc_err {
struct ras_ecc_log_info { struct ras_ecc_log_info {
struct mutex lock; struct mutex lock;
siphash_key_t ecc_key;
struct radix_tree_root de_page_tree; struct radix_tree_root de_page_tree;
uint64_t de_queried_count; uint64_t de_queried_count;
uint64_t prev_de_queried_count; uint64_t prev_de_queried_count;
@ -573,7 +571,6 @@ struct ras_fs_data {
}; };
struct ras_err_addr { struct ras_err_addr {
struct list_head node;
uint64_t err_status; uint64_t err_status;
uint64_t err_ipid; uint64_t err_ipid;
uint64_t err_addr; uint64_t err_addr;
@ -584,7 +581,6 @@ struct ras_err_info {
u64 ce_count; u64 ce_count;
u64 ue_count; u64 ue_count;
u64 de_count; u64 de_count;
struct list_head err_addr_list;
}; };
struct ras_err_node { struct ras_err_node {
@ -957,12 +953,6 @@ int amdgpu_ras_unbind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk)
ssize_t amdgpu_ras_aca_sysfs_read(struct device *dev, struct device_attribute *attr, ssize_t amdgpu_ras_aca_sysfs_read(struct device *dev, struct device_attribute *attr,
struct aca_handle *handle, char *buf, void *data); struct aca_handle *handle, char *buf, void *data);
void amdgpu_ras_add_mca_err_addr(struct ras_err_info *err_info,
struct ras_err_addr *err_addr);
void amdgpu_ras_del_mca_err_addr(struct ras_err_info *err_info,
struct ras_err_addr *mca_err_addr);
void amdgpu_ras_set_fed(struct amdgpu_device *adev, bool status); void amdgpu_ras_set_fed(struct amdgpu_device *adev, bool status);
bool amdgpu_ras_get_fed_status(struct amdgpu_device *adev); bool amdgpu_ras_get_fed_status(struct amdgpu_device *adev);

86
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
View file

@ -204,55 +204,6 @@ static int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,
return AMDGPU_RAS_SUCCESS; return AMDGPU_RAS_SUCCESS;
} }
int amdgpu_umc_bad_page_polling_timeout(struct amdgpu_device *adev,
uint32_t reset, uint32_t timeout_ms)
{
struct ras_err_data err_data;
struct ras_common_if head = {
.block = AMDGPU_RAS_BLOCK__UMC,
};
struct ras_manager *obj = amdgpu_ras_find_obj(adev, &head);
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
uint32_t timeout = timeout_ms;
memset(&err_data, 0, sizeof(err_data));
amdgpu_ras_error_data_init(&err_data);
do {
amdgpu_umc_handle_bad_pages(adev, &err_data);
if (timeout && !err_data.de_count) {
msleep(1);
timeout--;
}
} while (timeout && !err_data.de_count);
if (!timeout)
dev_warn(adev->dev, "Can't find bad pages\n");
if (err_data.de_count)
dev_info(adev->dev, "%ld new deferred hardware errors detected\n", err_data.de_count);
if (obj) {
obj->err_data.ue_count += err_data.ue_count;
obj->err_data.ce_count += err_data.ce_count;
obj->err_data.de_count += err_data.de_count;
}
amdgpu_ras_error_data_fini(&err_data);
kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
if (reset || (err_data.err_addr_cnt && con && con->is_rma)) {
con->gpu_reset_flags |= reset;
amdgpu_ras_reset_gpu(adev);
}
return 0;
}
int amdgpu_umc_pasid_poison_handler(struct amdgpu_device *adev, int amdgpu_umc_pasid_poison_handler(struct amdgpu_device *adev,
enum amdgpu_ras_block block, uint16_t pasid, enum amdgpu_ras_block block, uint16_t pasid,
pasid_notify pasid_fn, void *data, uint32_t reset) pasid_notify pasid_fn, void *data, uint32_t reset)
@ -472,43 +423,6 @@ int amdgpu_umc_update_ecc_status(struct amdgpu_device *adev,
return 0; return 0;
} }
static int amdgpu_umc_uint64_cmp(const void *a, const void *b)
{
uint64_t *addr_a = (uint64_t *)a;
uint64_t *addr_b = (uint64_t *)b;
if (*addr_a > *addr_b)
return 1;
else if (*addr_a < *addr_b)
return -1;
else
return 0;
}
/* Use string hash to avoid logging the same bad pages repeatedly */
int amdgpu_umc_build_pages_hash(struct amdgpu_device *adev,
uint64_t *pfns, int len, uint64_t *val)
{
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
char buf[MAX_UMC_HASH_STRING_SIZE] = {0};
int offset = 0, i = 0;
uint64_t hash_val;
if (!pfns || !len)
return -EINVAL;
sort(pfns, len, sizeof(uint64_t), amdgpu_umc_uint64_cmp, NULL);
for (i = 0; i < len; i++)
offset += snprintf(&buf[offset], sizeof(buf) - offset, "%llx", pfns[i]);
hash_val = siphash(buf, offset, &con->umc_ecc_log.ecc_key);
*val = hash_val;
return 0;
}
int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev, int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev,
struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err) struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err)
{ {

5
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
View file

@ -127,13 +127,8 @@ int amdgpu_umc_page_retirement_mca(struct amdgpu_device *adev,
int amdgpu_umc_loop_channels(struct amdgpu_device *adev, int amdgpu_umc_loop_channels(struct amdgpu_device *adev,
umc_func func, void *data); umc_func func, void *data);
int amdgpu_umc_bad_page_polling_timeout(struct amdgpu_device *adev,
uint32_t reset, uint32_t timeout_ms);
int amdgpu_umc_update_ecc_status(struct amdgpu_device *adev, int amdgpu_umc_update_ecc_status(struct amdgpu_device *adev,
uint64_t status, uint64_t ipid, uint64_t addr); uint64_t status, uint64_t ipid, uint64_t addr);
int amdgpu_umc_build_pages_hash(struct amdgpu_device *adev,
uint64_t *pfns, int len, uint64_t *val);
int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev, int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev,
struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err); struct radix_tree_root *ecc_tree, struct ras_ecc_err *ecc_err);