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	mei: trace pci configuration space io
Use tracing events also for reading and writing pci configuration space
<debugfs>/tracing/events/mei/mei_pci_reg_{read,write}
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
			
			
This commit is contained in:
		
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					 4 changed files with 56 additions and 4 deletions
				
			
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			@ -189,8 +189,11 @@ static int mei_me_fw_status(struct mei_device *dev,
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	fw_status->count = fw_src->count;
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	for (i = 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) {
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		ret = pci_read_config_dword(pdev,
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			fw_src->status[i], &fw_status->status[i]);
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		ret = pci_read_config_dword(pdev, fw_src->status[i],
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					    &fw_status->status[i]);
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		trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HSF_X",
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				       fw_src->status[i],
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				       fw_status->status[i]);
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		if (ret)
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			return ret;
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	}
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			@ -215,6 +218,7 @@ static void mei_me_hw_config(struct mei_device *dev)
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	reg = 0;
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	pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
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	trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
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	hw->d0i3_supported =
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		((reg & PCI_CFG_HFS_1_D0I3_MSK) == PCI_CFG_HFS_1_D0I3_MSK);
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			@ -1248,6 +1252,7 @@ static bool mei_me_fw_type_nm(struct pci_dev *pdev)
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	u32 reg;
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	pci_read_config_dword(pdev, PCI_CFG_HFS_2, ®);
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	trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_2", PCI_CFG_HFS_2, reg);
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	/* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
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	return (reg & 0x600) == 0x200;
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}
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			@ -1260,6 +1265,7 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev)
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	u32 reg;
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	/* Read ME FW Status check for SPS Firmware */
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	pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
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	trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
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	/* if bits [19:16] = 15, running SPS Firmware */
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	return (reg & 0xf0000) == 0xf0000;
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}
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			@ -28,6 +28,9 @@
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#include "client.h"
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#include "hbm.h"
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#include "mei-trace.h"
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/**
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 * mei_txe_reg_read - Reads 32bit data from the txe device
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 *
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			@ -640,8 +643,11 @@ static int mei_txe_fw_status(struct mei_device *dev,
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	fw_status->count = fw_src->count;
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	for (i = 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) {
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		ret = pci_read_config_dword(pdev,
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			fw_src->status[i], &fw_status->status[i]);
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		ret = pci_read_config_dword(pdev, fw_src->status[i],
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					    &fw_status->status[i]);
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		trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HSF_X",
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				       fw_src->status[i],
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				       fw_status->status[i]);
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		if (ret)
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			return ret;
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	}
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			@ -22,4 +22,6 @@
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EXPORT_TRACEPOINT_SYMBOL(mei_reg_read);
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EXPORT_TRACEPOINT_SYMBOL(mei_reg_write);
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EXPORT_TRACEPOINT_SYMBOL(mei_pci_cfg_read);
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EXPORT_TRACEPOINT_SYMBOL(mei_pci_cfg_write);
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#endif /* __CHECKER__ */
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			@ -64,6 +64,44 @@ TRACE_EVENT(mei_reg_write,
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		  __get_str(dev), __entry->reg,  __entry->offs, __entry->val)
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);
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TRACE_EVENT(mei_pci_cfg_read,
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	TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val),
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	TP_ARGS(dev, reg, offs, val),
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	TP_STRUCT__entry(
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		__string(dev, dev_name(dev))
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		__field(const char *, reg)
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		__field(u32, offs)
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		__field(u32, val)
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	),
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	TP_fast_assign(
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		__assign_str(dev, dev_name(dev))
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		__entry->reg  = reg;
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		__entry->offs = offs;
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		__entry->val = val;
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	),
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	TP_printk("[%s] pci cfg read %s:[%#x] = %#x",
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		  __get_str(dev), __entry->reg, __entry->offs, __entry->val)
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);
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TRACE_EVENT(mei_pci_cfg_write,
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	TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val),
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	TP_ARGS(dev, reg, offs, val),
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	TP_STRUCT__entry(
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		__string(dev, dev_name(dev))
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		__field(const char *, reg)
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		__field(u32, offs)
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		__field(u32, val)
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	),
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	TP_fast_assign(
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		__assign_str(dev, dev_name(dev))
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		__entry->reg = reg;
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		__entry->offs = offs;
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		__entry->val = val;
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	),
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	TP_printk("[%s] pci cfg write %s[%#x] = %#x)",
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		  __get_str(dev), __entry->reg,  __entry->offs, __entry->val)
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);
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#endif /* _MEI_TRACE_H_ */
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/* This part must be outside protection */
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