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	drm/amdgpu: use scheduler dependencies for VM updates
Instead of putting that into the job sync object. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221014084641.128280-9-christian.koenig@amd.com
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						aab9cf7b69
					
				
					 3 changed files with 52 additions and 16 deletions
				
			
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					@ -259,6 +259,14 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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	return 0;
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						return 0;
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}
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					}
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					/* Free the entry back to the slab */
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					static void amdgpu_sync_entry_free(struct amdgpu_sync_entry *e)
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					{
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						hash_del(&e->node);
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						dma_fence_put(e->fence);
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						kmem_cache_free(amdgpu_sync_slab, e);
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					}
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/**
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					/**
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 * amdgpu_sync_peek_fence - get the next fence not signaled yet
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					 * amdgpu_sync_peek_fence - get the next fence not signaled yet
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 *
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					 *
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					@ -280,9 +288,7 @@ struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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		struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
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							struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
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		if (dma_fence_is_signaled(f)) {
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							if (dma_fence_is_signaled(f)) {
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			hash_del(&e->node);
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								amdgpu_sync_entry_free(e);
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			dma_fence_put(f);
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			kmem_cache_free(amdgpu_sync_slab, e);
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			continue;
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								continue;
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		}
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							}
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		if (ring && s_fence) {
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							if (ring && s_fence) {
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					@ -355,15 +361,42 @@ int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
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			if (r)
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								if (r)
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				return r;
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									return r;
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		} else {
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							} else {
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			hash_del(&e->node);
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								amdgpu_sync_entry_free(e);
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			dma_fence_put(f);
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			kmem_cache_free(amdgpu_sync_slab, e);
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		}
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							}
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	}
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						}
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	return 0;
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						return 0;
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}
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					}
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					/**
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					 * amdgpu_sync_push_to_job - push fences into job
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					 * @sync: sync object to get the fences from
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					 * @job: job to push the fences into
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					 *
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					 * Add all unsignaled fences from sync to job.
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					 */
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					int amdgpu_sync_push_to_job(struct amdgpu_sync *sync, struct amdgpu_job *job)
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					{
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						struct amdgpu_sync_entry *e;
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						struct hlist_node *tmp;
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						struct dma_fence *f;
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						int i, r;
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						hash_for_each_safe(sync->fences, i, tmp, e, node) {
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							f = e->fence;
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							if (dma_fence_is_signaled(f)) {
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								amdgpu_sync_entry_free(e);
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								continue;
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							}
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							dma_fence_get(f);
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							r = drm_sched_job_add_dependency(&job->base, f);
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							if (r)
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								return r;
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						}
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						return 0;
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					}
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int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
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					int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
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{
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					{
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	struct amdgpu_sync_entry *e;
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						struct amdgpu_sync_entry *e;
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					@ -375,9 +408,7 @@ int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
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		if (r)
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							if (r)
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			return r;
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								return r;
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		hash_del(&e->node);
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							amdgpu_sync_entry_free(e);
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		dma_fence_put(e->fence);
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		kmem_cache_free(amdgpu_sync_slab, e);
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	}
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						}
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	return 0;
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						return 0;
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					@ -396,11 +427,8 @@ void amdgpu_sync_free(struct amdgpu_sync *sync)
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	struct hlist_node *tmp;
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						struct hlist_node *tmp;
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	unsigned int i;
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						unsigned int i;
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	hash_for_each_safe(sync->fences, i, tmp, e, node) {
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						hash_for_each_safe(sync->fences, i, tmp, e, node)
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		hash_del(&e->node);
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							amdgpu_sync_entry_free(e);
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		dma_fence_put(e->fence);
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		kmem_cache_free(amdgpu_sync_slab, e);
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	}
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}
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					}
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/**
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					/**
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					@ -30,6 +30,7 @@ struct dma_fence;
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struct dma_resv;
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					struct dma_resv;
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struct amdgpu_device;
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					struct amdgpu_device;
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struct amdgpu_ring;
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					struct amdgpu_ring;
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					struct amdgpu_job;
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enum amdgpu_sync_mode {
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					enum amdgpu_sync_mode {
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	AMDGPU_SYNC_ALWAYS,
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						AMDGPU_SYNC_ALWAYS,
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					@ -54,6 +55,7 @@ struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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				     struct amdgpu_ring *ring);
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									     struct amdgpu_ring *ring);
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struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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					struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone);
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					int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone);
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					int amdgpu_sync_push_to_job(struct amdgpu_sync *sync, struct amdgpu_job *job);
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int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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					int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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void amdgpu_sync_free(struct amdgpu_sync *sync);
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					void amdgpu_sync_free(struct amdgpu_sync *sync);
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int amdgpu_sync_init(void);
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					int amdgpu_sync_init(void);
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					@ -87,6 +87,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
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				  struct dma_resv *resv,
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									  struct dma_resv *resv,
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				  enum amdgpu_sync_mode sync_mode)
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									  enum amdgpu_sync_mode sync_mode)
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{
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					{
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						struct amdgpu_sync sync;
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	int r;
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						int r;
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	r = amdgpu_vm_sdma_alloc_job(p, 0);
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						r = amdgpu_vm_sdma_alloc_job(p, 0);
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					@ -96,7 +97,12 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
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	if (!resv)
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						if (!resv)
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		return 0;
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							return 0;
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	return amdgpu_sync_resv(p->adev, &p->job->sync, resv, sync_mode, p->vm);
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						amdgpu_sync_create(&sync);
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						r = amdgpu_sync_resv(p->adev, &sync, resv, sync_mode, p->vm);
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						if (!r)
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							r = amdgpu_sync_push_to_job(&sync, p->job);
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						amdgpu_sync_free(&sync);
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						return r;
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}
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					}
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/**
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					/**
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					@ -225,7 +231,7 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
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	/* Wait for PD/PT moves to be completed */
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						/* Wait for PD/PT moves to be completed */
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	dma_resv_iter_begin(&cursor, bo->tbo.base.resv, DMA_RESV_USAGE_KERNEL);
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						dma_resv_iter_begin(&cursor, bo->tbo.base.resv, DMA_RESV_USAGE_KERNEL);
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	dma_resv_for_each_fence_unlocked(&cursor, fence) {
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						dma_resv_for_each_fence_unlocked(&cursor, fence) {
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		r = amdgpu_sync_fence(&p->job->sync, fence);
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							r = drm_sched_job_add_dependency(&p->job->base, fence);
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		if (r) {
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							if (r) {
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			dma_resv_iter_end(&cursor);
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								dma_resv_iter_end(&cursor);
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			return r;
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								return r;
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