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	pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value
The PWM_PIN_LEVEL bit is leave unset by the kernel PWM driver.
Prior to commit 08ee77b5a5,
the PWM_PIN_LEVEL bit was always clear when the PWM was disable
and a 0 logic level was apply to the output.
According to the LPC32x0 User Manual [1],
the default value for bit 30 (PWM_PIN_LEVEL) is 0.
This change initialize the pin level to 0 (default value) and
update the register value accordingly.
[1] http://www.nxp.com/documents/user_manual/UM10326.pdf
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
			
			
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					 1 changed files with 7 additions and 0 deletions
				
			
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			@ -25,6 +25,7 @@ struct lpc32xx_pwm_chip {
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};
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#define PWM_ENABLE	BIT(31)
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#define PWM_PIN_LEVEL	BIT(30)
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#define to_lpc32xx_pwm_chip(_chip) \
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	container_of(_chip, struct lpc32xx_pwm_chip, chip)
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			@ -103,6 +104,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
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	struct lpc32xx_pwm_chip *lpc32xx;
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	struct resource *res;
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	int ret;
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	u32 val;
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	lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
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	if (!lpc32xx)
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			@ -128,6 +130,11 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
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		return ret;
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	}
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	/* When PWM is disable, configure the output to the default value */
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	val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
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	val &= ~PWM_PIN_LEVEL;
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	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
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	platform_set_drvdata(pdev, lpc32xx);
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	return 0;
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