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	ice: manage interrupts during poll exit
The driver would occasionally miss that there were outstanding descriptors to clean when exiting busy/napi poll. This issue has been in the code since the introduction of the ice driver. Attempt to "catch" any remaining work by triggering a software interrupt when exiting napi poll or busy-poll. This will not cause extra interrupts in the case of normal execution. This issue was found when running sfnt-pingpong, with busy poll enabled, and typically with larger I/O sizes like > 8192, the program would occasionally report > 1 second maximums to complete a ping pong. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Tony Brelinski <tonyx.brelinski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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					 2 changed files with 13 additions and 1 deletions
				
			
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			@ -130,6 +130,7 @@
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#define GLINT_DYN_CTL_ITR_INDX_M		ICE_M(0x3, 3)
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#define GLINT_DYN_CTL_INTERVAL_S		5
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#define GLINT_DYN_CTL_INTERVAL_M		ICE_M(0xFFF, 5)
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#define GLINT_DYN_CTL_SW_ITR_INDX_ENA_M		BIT(24)
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#define GLINT_DYN_CTL_SW_ITR_INDX_M		ICE_M(0x3, 25)
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#define GLINT_DYN_CTL_WB_ON_ITR_M		BIT(30)
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#define GLINT_DYN_CTL_INTENA_MSK_M		BIT(31)
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			@ -1302,6 +1302,7 @@ static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
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static void ice_update_ena_itr(struct ice_q_vector *q_vector)
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{
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	struct ice_vsi *vsi = q_vector->vsi;
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	bool wb_en = q_vector->wb_on_itr;
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	u32 itr_val;
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	if (test_bit(ICE_DOWN, vsi->state))
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			@ -1310,7 +1311,7 @@ static void ice_update_ena_itr(struct ice_q_vector *q_vector)
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	/* When exiting WB_ON_ITR, let ITR resume its normal
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	 * interrupts-enabled path.
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	 */
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	if (q_vector->wb_on_itr)
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	if (wb_en)
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		q_vector->wb_on_itr = false;
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	/* This will do nothing if dynamic updates are not enabled. */
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			@ -1318,6 +1319,16 @@ static void ice_update_ena_itr(struct ice_q_vector *q_vector)
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	/* net_dim() updates ITR out-of-band using a work item */
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	itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
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	/* trigger an immediate software interrupt when exiting
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	 * busy poll, to make sure to catch any pending cleanups
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	 * that might have been missed due to interrupt state
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	 * transition.
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	 */
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	if (wb_en) {
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		itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
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			   GLINT_DYN_CTL_SW_ITR_INDX_M |
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			   GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
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	}
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	wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
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}
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