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	dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Add bindings documentation for the X1E80100 Graphics Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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					@ -18,6 +18,7 @@ description: |
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    include/dt-bindings/clock/qcom,sm8550-gpucc.h
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					    include/dt-bindings/clock/qcom,sm8550-gpucc.h
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    include/dt-bindings/reset/qcom,sm8450-gpucc.h
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					    include/dt-bindings/reset/qcom,sm8450-gpucc.h
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    include/dt-bindings/reset/qcom,sm8650-gpucc.h
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					    include/dt-bindings/reset/qcom,sm8650-gpucc.h
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					    include/dt-bindings/reset/qcom,x1e80100-gpucc.h
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properties:
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					properties:
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					  compatible:
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					@ -25,6 +26,7 @@ properties:
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      - qcom,sm8450-gpucc
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					      - qcom,sm8450-gpucc
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      - qcom,sm8550-gpucc
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					      - qcom,sm8550-gpucc
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      - qcom,sm8650-gpucc
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					      - qcom,sm8650-gpucc
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					      - qcom,x1e80100-gpucc
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  clocks:
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					  clocks:
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								include/dt-bindings/clock/qcom,x1e80100-gpucc.h
									
									
									
									
									
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					/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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					/*
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					 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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					 */
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					#ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_GPU_CC_H
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					#define _DT_BINDINGS_CLK_QCOM_X1E80100_GPU_CC_H
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					/* GPU_CC clocks */
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					#define GPU_CC_AHB_CLK						0
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					#define GPU_CC_CB_CLK						1
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					#define GPU_CC_CRC_AHB_CLK					2
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					#define GPU_CC_CX_FF_CLK					3
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					#define GPU_CC_CX_GMU_CLK					4
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					#define GPU_CC_CXO_AON_CLK					5
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					#define GPU_CC_CXO_CLK						6
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					#define GPU_CC_DEMET_CLK					7
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					#define GPU_CC_DEMET_DIV_CLK_SRC				8
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					#define GPU_CC_FF_CLK_SRC					9
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					#define GPU_CC_FREQ_MEASURE_CLK					10
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					#define GPU_CC_GMU_CLK_SRC					11
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					#define GPU_CC_GX_GMU_CLK					12
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					#define GPU_CC_GX_VSENSE_CLK					13
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					#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK				14
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					#define GPU_CC_HUB_AON_CLK					15
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					#define GPU_CC_HUB_CLK_SRC					16
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					#define GPU_CC_HUB_CX_INT_CLK					17
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					#define GPU_CC_MEMNOC_GFX_CLK					18
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					#define GPU_CC_MND1X_0_GFX3D_CLK				19
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					#define GPU_CC_MND1X_1_GFX3D_CLK				20
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					#define GPU_CC_PLL0						21
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					#define GPU_CC_PLL1						22
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					#define GPU_CC_SLEEP_CLK					23
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					#define GPU_CC_XO_CLK_SRC					24
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					#define GPU_CC_XO_DIV_CLK_SRC					25
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					/* GDSCs */
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					#define GPU_CX_GDSC						0
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					#define GPU_GX_GDSC						1
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					#endif
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								include/dt-bindings/reset/qcom,x1e80100-gpucc.h
									
									
									
									
									
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								include/dt-bindings/reset/qcom,x1e80100-gpucc.h
									
									
									
									
									
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					/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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					/*
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					 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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					 */
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					#ifndef _DT_BINDINGS_RESET_QCOM_X1E80100_GPU_CC_H
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					#define _DT_BINDINGS_RESET_QCOM_X1E80100_GPU_CC_H
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					#define GPUCC_GPU_CC_ACD_BCR					0
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					#define GPUCC_GPU_CC_CB_BCR					1
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					#define GPUCC_GPU_CC_CX_BCR					2
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					#define GPUCC_GPU_CC_FAST_HUB_BCR				3
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					#define GPUCC_GPU_CC_FF_BCR					4
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					#define GPUCC_GPU_CC_GFX3D_AON_BCR				5
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					#define GPUCC_GPU_CC_GMU_BCR					6
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					#define GPUCC_GPU_CC_GX_BCR					7
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					#define GPUCC_GPU_CC_XO_BCR					8
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					#endif
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