mirror of
				https://github.com/torvalds/linux.git
				synced 2025-11-04 10:40:15 +02:00 
			
		
		
		
	rtc: rzn1: Add oscillator offset support
The RZN1 RTC can compensate the imprecision of the oscillator up to approximately 190ppm. Seconds can last slightly shorter or longer depending on the configuration. Below ~65ppm of correction, we can change the time spent in a second every minute, which is the most accurate compensation that the RTC can offer. Above, the compensation will be active every 20s. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-5-miquel.raynal@bootlin.com
This commit is contained in:
		
							parent
							
								
									b5ad1bf00d
								
							
						
					
					
						commit
						be4a11cf98
					
				
					 1 changed files with 73 additions and 0 deletions
				
			
		| 
						 | 
					@ -245,12 +245,85 @@ static int rzn1_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 | 
				
			||||||
	return 0;
 | 
						return 0;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					static int rzn1_rtc_read_offset(struct device *dev, long *offset)
 | 
				
			||||||
 | 
					{
 | 
				
			||||||
 | 
						struct rzn1_rtc *rtc = dev_get_drvdata(dev);
 | 
				
			||||||
 | 
						unsigned int ppb_per_step;
 | 
				
			||||||
 | 
						bool subtract;
 | 
				
			||||||
 | 
						u32 val;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						val = readl(rtc->base + RZN1_RTC_SUBU);
 | 
				
			||||||
 | 
						ppb_per_step = val & RZN1_RTC_SUBU_DEV ? 1017 : 3051;
 | 
				
			||||||
 | 
						subtract = val & RZN1_RTC_SUBU_DECR;
 | 
				
			||||||
 | 
						val &= 0x3F;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						if (!val)
 | 
				
			||||||
 | 
							*offset = 0;
 | 
				
			||||||
 | 
						else if (subtract)
 | 
				
			||||||
 | 
							*offset = -(((~val) & 0x3F) + 1) * ppb_per_step;
 | 
				
			||||||
 | 
						else
 | 
				
			||||||
 | 
							*offset = (val - 1) * ppb_per_step;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						return 0;
 | 
				
			||||||
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					static int rzn1_rtc_set_offset(struct device *dev, long offset)
 | 
				
			||||||
 | 
					{
 | 
				
			||||||
 | 
						struct rzn1_rtc *rtc = dev_get_drvdata(dev);
 | 
				
			||||||
 | 
						unsigned int steps;
 | 
				
			||||||
 | 
						int stepsh, stepsl;
 | 
				
			||||||
 | 
						u32 val;
 | 
				
			||||||
 | 
						int ret;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						/*
 | 
				
			||||||
 | 
						 * Check which resolution mode (every 20 or 60s) can be used.
 | 
				
			||||||
 | 
						 * Between 2 and 124 clock pulses can be added or substracted.
 | 
				
			||||||
 | 
						 *
 | 
				
			||||||
 | 
						 * In 20s mode, the minimum resolution is 2 / (32768 * 20) which is
 | 
				
			||||||
 | 
						 * close to 3051 ppb. In 60s mode, the resolution is closer to 1017.
 | 
				
			||||||
 | 
						 */
 | 
				
			||||||
 | 
						stepsh = DIV_ROUND_CLOSEST(offset, 1017);
 | 
				
			||||||
 | 
						stepsl = DIV_ROUND_CLOSEST(offset, 3051);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						if (stepsh >= -0x3E && stepsh <= 0x3E) {
 | 
				
			||||||
 | 
							/* 1017 ppb per step */
 | 
				
			||||||
 | 
							steps = stepsh;
 | 
				
			||||||
 | 
							val |= RZN1_RTC_SUBU_DEV;
 | 
				
			||||||
 | 
						} else if (stepsl >= -0x3E && stepsl <= 0x3E) {
 | 
				
			||||||
 | 
							/* 3051 ppb per step */
 | 
				
			||||||
 | 
							steps = stepsl;
 | 
				
			||||||
 | 
						} else {
 | 
				
			||||||
 | 
							return -ERANGE;
 | 
				
			||||||
 | 
						}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						if (!steps)
 | 
				
			||||||
 | 
							return 0;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						if (steps > 0) {
 | 
				
			||||||
 | 
							val |= steps + 1;
 | 
				
			||||||
 | 
						} else {
 | 
				
			||||||
 | 
							val |= RZN1_RTC_SUBU_DECR;
 | 
				
			||||||
 | 
							val |= (~(-steps - 1)) & 0x3F;
 | 
				
			||||||
 | 
						}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, val,
 | 
				
			||||||
 | 
									 !(val & RZN1_RTC_CTL2_WUST), 100, 2000000);
 | 
				
			||||||
 | 
						if (ret)
 | 
				
			||||||
 | 
							return ret;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						writel(val, rtc->base + RZN1_RTC_SUBU);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						return 0;
 | 
				
			||||||
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
static const struct rtc_class_ops rzn1_rtc_ops = {
 | 
					static const struct rtc_class_ops rzn1_rtc_ops = {
 | 
				
			||||||
	.read_time = rzn1_rtc_read_time,
 | 
						.read_time = rzn1_rtc_read_time,
 | 
				
			||||||
	.set_time = rzn1_rtc_set_time,
 | 
						.set_time = rzn1_rtc_set_time,
 | 
				
			||||||
	.read_alarm = rzn1_rtc_read_alarm,
 | 
						.read_alarm = rzn1_rtc_read_alarm,
 | 
				
			||||||
	.set_alarm = rzn1_rtc_set_alarm,
 | 
						.set_alarm = rzn1_rtc_set_alarm,
 | 
				
			||||||
	.alarm_irq_enable = rzn1_rtc_alarm_irq_enable,
 | 
						.alarm_irq_enable = rzn1_rtc_alarm_irq_enable,
 | 
				
			||||||
 | 
						.read_offset = rzn1_rtc_read_offset,
 | 
				
			||||||
 | 
						.set_offset = rzn1_rtc_set_offset,
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
static int rzn1_rtc_probe(struct platform_device *pdev)
 | 
					static int rzn1_rtc_probe(struct platform_device *pdev)
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
		Loading…
	
		Reference in a new issue