mirrors/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2025-11-04 10:40:15 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions

gpio: davinci: drop platform data support

Browse source 
There are no more any board files that use the platform data for
gpio-davinci. We can remove the header defining it and port the code to
no longer store any context in pdata.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240819151705.37258-1-brgl@bgdev.pl
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Bartosz Golaszewski 2024-08-19 17:17:04 +02:00
parent 9f0127b9ce
commit d29e741cad
2 changed files with 25 additions and 85 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

89
drivers/gpio/gpio-davinci.c
View file

@ -18,7 +18,6 @@
#include <linux/of.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/property.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/spinlock.h>
@ -154,74 +153,37 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
value ? &g->set_data : &g->clr_data);
}
static struct davinci_gpio_platform_data *
davinci_gpio_get_pdata(struct platform_device *pdev)
{
struct device_node *dn = pdev->dev.of_node;
struct davinci_gpio_platform_data *pdata;
int ret;
u32 val;
if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node)
return dev_get_platdata(&pdev->dev);
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return NULL;
ret = of_property_read_u32(dn, "ti,ngpio", &val);
if (ret)
goto of_err;
pdata->ngpio = val;
ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked", &val);
if (ret)
goto of_err;
pdata->gpio_unbanked = val;
return pdata;
of_err:
dev_err(&pdev->dev, "Populating pdata from DT failed: err %d\n", ret);
return NULL;
}
static int davinci_gpio_probe(struct platform_device *pdev)
{
int bank, i, ret = 0;
unsigned int ngpio, nbank, nirq;
unsigned int ngpio, nbank, nirq, gpio_unbanked;
struct davinci_gpio_controller *chips;
struct davinci_gpio_platform_data *pdata;
struct device *dev = &pdev->dev;
pdata = davinci_gpio_get_pdata(pdev);
if (!pdata) {
dev_err(dev, "No platform data found\n");
return -EINVAL;
}
dev->platform_data = pdata;
struct device_node *dn = dev_of_node(dev);
/*
* The gpio banks conceptually expose a segmented bitmap,
* and "ngpio" is one more than the largest zero-based
* bit index that's valid.
*/
ngpio = pdata->ngpio;
if (ngpio == 0) {
dev_err(dev, "How many GPIOs?\n");
return -EINVAL;
}
ret = of_property_read_u32(dn, "ti,ngpio", &ngpio);
if (ret)
return dev_err_probe(dev, ret, "Failed to get the number of GPIOs\n");
if (ngpio == 0)
return dev_err_probe(dev, -EINVAL, "How many GPIOs?\n");
/*
* If there are unbanked interrupts then the number of
* interrupts is equal to number of gpios else all are banked so
* number of interrupts is equal to number of banks(each with 16 gpios)
*/
if (pdata->gpio_unbanked)
nirq = pdata->gpio_unbanked;
ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked",
&gpio_unbanked);
if (ret)
return dev_err_probe(dev, ret, "Failed to get the unbanked GPIOs property\n");
if (gpio_unbanked)
nirq = gpio_unbanked;
else
nirq = DIV_ROUND_UP(ngpio, 16);
@ -252,7 +214,7 @@ static int davinci_gpio_probe(struct platform_device *pdev)
chips->chip.set = davinci_gpio_set;
chips->chip.ngpio = ngpio;
chips->chip.base = pdata->no_auto_base ? pdata->base : -1;
chips->chip.base = -1;
#ifdef CONFIG_OF_GPIO
chips->chip.parent = dev;
@ -261,6 +223,8 @@ static int davinci_gpio_probe(struct platform_device *pdev)
#endif
spin_lock_init(&chips->lock);
chips->gpio_unbanked = gpio_unbanked;
nbank = DIV_ROUND_UP(ngpio, 32);
for (bank = 0; bank < nbank; bank++)
chips->regs[bank] = gpio_base + offset_array[bank];
@ -488,7 +452,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
unsigned ngpio;
struct device *dev = &pdev->dev;
struct davinci_gpio_controller *chips = platform_get_drvdata(pdev);
struct davinci_gpio_platform_data *pdata = dev->platform_data;
struct davinci_gpio_regs __iomem *g;
struct irq_domain *irq_domain = NULL;
struct irq_chip *irq_chip;
@ -502,7 +465,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
if (dev->of_node)
gpio_get_irq_chip = (gpio_get_irq_chip_cb_t)device_get_match_data(dev);
ngpio = pdata->ngpio;
ngpio = chips->chip.ngpio;
clk = devm_clk_get(dev, "gpio");
if (IS_ERR(clk)) {
@ -514,7 +477,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
if (ret)
return ret;
if (!pdata->gpio_unbanked) {
if (chips->gpio_unbanked) {
irq = devm_irq_alloc_descs(dev, -1, 0, ngpio, 0);
if (irq < 0) {
dev_err(dev, "Couldn't allocate IRQ numbers\n");
@ -546,11 +509,11 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
* controller only handling trigger modes. We currently assume no
* IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
*/
if (pdata->gpio_unbanked) {
if (chips->gpio_unbanked) {
/* pass "bank 0" GPIO IRQs to AINTC */
chips->chip.to_irq = gpio_to_irq_unbanked;
chips->gpio_unbanked = pdata->gpio_unbanked;
binten = GENMASK(pdata->gpio_unbanked / 16, 0);
binten = GENMASK(chips->gpio_unbanked / 16, 0);
/* AINTC handles mask/unmask; GPIO handles triggering */
irq = chips->irqs[0];
@ -564,7 +527,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
writel_relaxed(~0, &g->set_rising);
/* set the direct IRQs up to use that irqchip */
for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++) {
for (gpio = 0; gpio < chips->gpio_unbanked; gpio++) {
irq_set_chip(chips->irqs[gpio], irq_chip);
irq_set_handler_data(chips->irqs[gpio], chips);
irq_set_status_flags(chips->irqs[gpio],
@ -675,8 +638,7 @@ static void davinci_gpio_restore_context(struct davinci_gpio_controller *chips,
static int davinci_gpio_suspend(struct device *dev)
{
struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
u32 nbank = DIV_ROUND_UP(chips->chip.ngpio, 32);
davinci_gpio_save_context(chips, nbank);
@ -686,8 +648,7 @@ static int davinci_gpio_suspend(struct device *dev)
static int davinci_gpio_resume(struct device *dev)
{
struct davinci_gpio_controller *chips = dev_get_drvdata(dev);
struct davinci_gpio_platform_data *pdata = dev_get_platdata(dev);
u32 nbank = DIV_ROUND_UP(pdata->ngpio, 32);
u32 nbank = DIV_ROUND_UP(chips->chip.ngpio, 32);
davinci_gpio_restore_context(chips, nbank);

21
include/linux/platform_data/gpio-davinci.h
View file

@ -1,21 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* DaVinci GPIO Platform Related Defines
*
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
*/
#ifndef __DAVINCI_GPIO_PLATFORM_H
#define __DAVINCI_GPIO_PLATFORM_H
struct davinci_gpio_platform_data {
bool no_auto_base;
u32 base;
u32 ngpio;
u32 gpio_unbanked;
};
/* Convert GPIO signal to GPIO pin number */
#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
#endif