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gpio: ep93xx: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Alexander Sverdlin <alexander.sverdlin@gmail.com> Cc: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Thierry Reding <treding@nvidia.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190812130000.22252-1-linus.walleij@linaro.org
This commit is contained in:
Linus Walleij
parent
8a6abcd04e
commit
d2b0919615
1 changed files with 73 additions and 67 deletions
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@ -269,56 +269,6 @@ static struct irq_chip ep93xx_gpio_irq_chip = {
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.irq_set_type = ep93xx_gpio_irq_type,
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};
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static int ep93xx_gpio_init_irq(struct platform_device *pdev,
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struct ep93xx_gpio *epg)
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{
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int ab_parent_irq = platform_get_irq(pdev, 0);
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struct device *dev = &pdev->dev;
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int gpio_irq;
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int ret;
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int i;
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/* The A bank */
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ret = gpiochip_irqchip_add(&epg->gc[0], &ep93xx_gpio_irq_chip,
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64, handle_level_irq,
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IRQ_TYPE_NONE);
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if (ret) {
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dev_err(dev, "Could not add irqchip 0\n");
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return ret;
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}
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gpiochip_set_chained_irqchip(&epg->gc[0], &ep93xx_gpio_irq_chip,
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ab_parent_irq,
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ep93xx_gpio_ab_irq_handler);
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/* The B bank */
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ret = gpiochip_irqchip_add(&epg->gc[1], &ep93xx_gpio_irq_chip,
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72, handle_level_irq,
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IRQ_TYPE_NONE);
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if (ret) {
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dev_err(dev, "Could not add irqchip 1\n");
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return ret;
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}
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gpiochip_set_chained_irqchip(&epg->gc[1], &ep93xx_gpio_irq_chip,
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ab_parent_irq,
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ep93xx_gpio_ab_irq_handler);
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/* The F bank */
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for (i = 0; i < 8; i++) {
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gpio_irq = EP93XX_GPIO_F_IRQ_BASE + i;
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irq_set_chip_data(gpio_irq, &epg->gc[5]);
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irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
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handle_level_irq);
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irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST);
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}
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for (i = 1; i <= 8; i++)
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irq_set_chained_handler_and_data(platform_get_irq(pdev, i),
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ep93xx_gpio_f_irq_handler,
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&epg->gc[i]);
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return 0;
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}
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/*************************************************************************
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* gpiolib interface for EP93xx on-chip GPIOs
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*************************************************************************/
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@ -328,26 +278,33 @@ struct ep93xx_gpio_bank {
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int dir;
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int base;
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bool has_irq;
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bool has_hierarchical_irq;
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unsigned int irq_base;
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};
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#define EP93XX_GPIO_BANK(_label, _data, _dir, _base, _has_irq) \
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#define EP93XX_GPIO_BANK(_label, _data, _dir, _base, _has_irq, _has_hier, _irq_base) \
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{ \
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.label = _label, \
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.data = _data, \
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.dir = _dir, \
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.base = _base, \
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.has_irq = _has_irq, \
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.has_hierarchical_irq = _has_hier, \
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.irq_base = _irq_base, \
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}
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static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = {
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EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true), /* Bank A has 8 IRQs */
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EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true), /* Bank B has 8 IRQs */
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EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, false),
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EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, false),
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EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, false),
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EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, true), /* Bank F has 8 IRQs */
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EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, false),
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EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false),
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/* Bank A has 8 IRQs */
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EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true, false, 64),
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/* Bank B has 8 IRQs */
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EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true, false, 72),
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EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, false, false, 0),
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EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, false, false, 0),
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EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, false, false, 0),
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/* Bank F has 8 IRQs */
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EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, false, true, 0),
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EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, false, false, 0),
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EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false, false, 0),
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};
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static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset,
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@ -369,12 +326,15 @@ static int ep93xx_gpio_f_to_irq(struct gpio_chip *gc, unsigned offset)
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return EP93XX_GPIO_F_IRQ_BASE + offset;
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}
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static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
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static int ep93xx_gpio_add_bank(struct gpio_chip *gc,
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struct platform_device *pdev,
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struct ep93xx_gpio *epg,
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struct ep93xx_gpio_bank *bank)
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{
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void __iomem *data = epg->base + bank->data;
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void __iomem *dir = epg->base + bank->dir;
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struct device *dev = &pdev->dev;
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struct gpio_irq_chip *girq;
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int err;
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err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0);
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@ -384,8 +344,59 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
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gc->label = bank->label;
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gc->base = bank->base;
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if (bank->has_irq)
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girq = &gc->irq;
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if (bank->has_irq || bank->has_hierarchical_irq) {
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gc->set_config = ep93xx_gpio_set_config;
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girq->chip = &ep93xx_gpio_irq_chip;
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}
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if (bank->has_irq) {
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int ab_parent_irq = platform_get_irq(pdev, 0);
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girq->parent_handler = ep93xx_gpio_ab_irq_handler;
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girq->num_parents = 1;
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girq->parents = devm_kcalloc(dev, 1,
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sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_level_irq;
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girq->parents[0] = ab_parent_irq;
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girq->first = bank->irq_base;
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}
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/* Only bank F has especially funky IRQ handling */
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if (bank->has_hierarchical_irq) {
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int gpio_irq;
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int i;
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/*
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* FIXME: convert this to use hierarchical IRQ support!
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* this requires fixing the root irqchip to be hierarchial.
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*/
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girq->parent_handler = ep93xx_gpio_f_irq_handler;
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girq->num_parents = 8;
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girq->parents = devm_kcalloc(dev, 8,
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sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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/* Pick resources 1..8 for these IRQs */
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for (i = 1; i <= 8; i++)
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girq->parents[i - 1] = platform_get_irq(pdev, i);
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for (i = 0; i < 8; i++) {
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gpio_irq = EP93XX_GPIO_F_IRQ_BASE + i;
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irq_set_chip_data(gpio_irq, &epg->gc[5]);
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irq_set_chip_and_handler(gpio_irq,
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&ep93xx_gpio_irq_chip,
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handle_level_irq);
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irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST);
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}
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_level_irq;
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gc->to_irq = ep93xx_gpio_f_to_irq;
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}
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return devm_gpiochip_add_data(dev, gc, epg);
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}
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@ -407,16 +418,11 @@ static int ep93xx_gpio_probe(struct platform_device *pdev)
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struct gpio_chip *gc = &epg->gc[i];
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struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i];
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if (ep93xx_gpio_add_bank(gc, &pdev->dev, epg, bank))
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if (ep93xx_gpio_add_bank(gc, pdev, epg, bank))
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dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
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bank->label);
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/* Only bank F has especially funky IRQ handling */
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if (i == 5)
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gc->to_irq = ep93xx_gpio_f_to_irq;
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}
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ep93xx_gpio_init_irq(pdev, epg);
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return 0;
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}
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