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MIPS: msp71xx: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2197/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Gleixner
Ralf Baechle
parent
7ec8af9e34
commit
d7881fbdf8
3 changed files with 46 additions and 93 deletions
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@ -77,7 +77,7 @@ static inline void cic_wmb(void)
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dummy_read++;
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}
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static inline void unmask_cic_irq(unsigned int irq)
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static void unmask_cic_irq(struct irq_data *d)
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{
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volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
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int vpe;
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@ -89,18 +89,18 @@ static inline void unmask_cic_irq(unsigned int irq)
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* Make sure we have IRQ affinity. It may have changed while
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* we were processing the IRQ.
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*/
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if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity))
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if (!cpumask_test_cpu(smp_processor_id(), d->affinity))
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return;
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#endif
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vpe = get_current_vpe();
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LOCK_VPE(flags, mtflags);
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cic_msk_reg[vpe] |= (1 << (irq - MSP_CIC_INTBASE));
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cic_msk_reg[vpe] |= (1 << (d->irq - MSP_CIC_INTBASE));
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UNLOCK_VPE(flags, mtflags);
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cic_wmb();
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}
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static inline void mask_cic_irq(unsigned int irq)
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static void mask_cic_irq(struct irq_data *d)
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{
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volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
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int vpe = get_current_vpe();
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@ -108,33 +108,27 @@ static inline void mask_cic_irq(unsigned int irq)
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unsigned long flags, mtflags;
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#endif
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LOCK_VPE(flags, mtflags);
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cic_msk_reg[vpe] &= ~(1 << (irq - MSP_CIC_INTBASE));
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cic_msk_reg[vpe] &= ~(1 << (d->irq - MSP_CIC_INTBASE));
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UNLOCK_VPE(flags, mtflags);
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cic_wmb();
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}
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static inline void msp_cic_irq_ack(unsigned int irq)
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static void msp_cic_irq_ack(struct irq_data *d)
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{
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mask_cic_irq(irq);
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mask_cic_irq(d);
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/*
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* Only really necessary for 18, 16-14 and sometimes 3:0
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* (since these can be edge sensitive) but it doesn't
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* hurt for the others
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*/
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*CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE));
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smtc_im_ack_irq(irq);
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}
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static void msp_cic_irq_end(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
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unmask_cic_irq(irq);
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*CIC_STS_REG = (1 << (d->irq - MSP_CIC_INTBASE));
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smtc_im_ack_irq(d->irq);
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}
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/*Note: Limiting to VSMP . Not tested in SMTC */
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#ifdef CONFIG_MIPS_MT_SMP
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static inline int msp_cic_irq_set_affinity(unsigned int irq,
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const struct cpumask *cpumask)
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static int msp_cic_irq_set_affinity(struct irq_data *d,
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const struct cpumask *cpumask, bool force)
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{
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int cpu;
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unsigned long flags;
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@ -163,13 +157,12 @@ static inline int msp_cic_irq_set_affinity(unsigned int irq,
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static struct irq_chip msp_cic_irq_controller = {
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.name = "MSP_CIC",
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.mask = mask_cic_irq,
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.mask_ack = msp_cic_irq_ack,
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.unmask = unmask_cic_irq,
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.ack = msp_cic_irq_ack,
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.end = msp_cic_irq_end,
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.irq_mask = mask_cic_irq,
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.irq_mask_ack = msp_cic_irq_ack,
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.irq_unmask = unmask_cic_irq,
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.irq_ack = msp_cic_irq_ack,
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#ifdef CONFIG_MIPS_MT_SMP
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.set_affinity = msp_cic_irq_set_affinity,
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.irq_set_affinity = msp_cic_irq_set_affinity,
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#endif
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};
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@ -220,7 +213,5 @@ void msp_cic_irq_dispatch(void)
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do_IRQ(ffs(pending) + MSP_CIC_INTBASE - 1);
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} else{
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spurious_interrupt();
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/* Re-enable the CIC cascaded interrupt. */
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irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
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}
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}
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@ -48,100 +48,61 @@ static inline void per_wmb(void)
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dummy_read++;
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}
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static inline void unmask_per_irq(unsigned int irq)
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static inline void unmask_per_irq(struct irq_data *d)
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{
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#ifdef CONFIG_SMP
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unsigned long flags;
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spin_lock_irqsave(&per_lock, flags);
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*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
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*PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
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spin_unlock_irqrestore(&per_lock, flags);
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#else
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*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
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*PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
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#endif
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per_wmb();
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}
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static inline void mask_per_irq(unsigned int irq)
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static inline void mask_per_irq(struct irq_data *d)
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{
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#ifdef CONFIG_SMP
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unsigned long flags;
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spin_lock_irqsave(&per_lock, flags);
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*PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
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*PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
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spin_unlock_irqrestore(&per_lock, flags);
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#else
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*PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
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*PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
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#endif
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per_wmb();
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}
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static inline void msp_per_irq_enable(unsigned int irq)
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static inline void msp_per_irq_ack(struct irq_data *d)
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{
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unmask_per_irq(irq);
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}
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static inline void msp_per_irq_disable(unsigned int irq)
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{
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mask_per_irq(irq);
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}
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static unsigned int msp_per_irq_startup(unsigned int irq)
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{
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msp_per_irq_enable(irq);
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return 0;
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}
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#define msp_per_irq_shutdown msp_per_irq_disable
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static inline void msp_per_irq_ack(unsigned int irq)
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{
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mask_per_irq(irq);
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mask_per_irq(d);
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/*
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* In the PER interrupt controller, only bits 11 and 10
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* are write-to-clear, (SPI TX complete, SPI RX complete).
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* It does nothing for any others.
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*/
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*PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
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/* Re-enable the CIC cascaded interrupt and return */
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irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
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}
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static void msp_per_irq_end(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
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unmask_per_irq(irq);
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*PER_INT_STS_REG = (1 << (d->irq - MSP_PER_INTBASE));
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}
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#ifdef CONFIG_SMP
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static inline int msp_per_irq_set_affinity(unsigned int irq,
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const struct cpumask *affinity)
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static int msp_per_irq_set_affinity(struct irq_data *d,
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const struct cpumask *affinity, bool force)
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{
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unsigned long flags;
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/*
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* Calls to ack, end, startup, enable are spinlocked in setup_irq and
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* __do_IRQ.Callers of this function do not spinlock,so we need to
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* do so ourselves.
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*/
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raw_spin_lock_irqsave(&irq_desc[irq].lock, flags);
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msp_per_irq_enable(irq);
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raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
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/* WTF is this doing ????? */
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unmask_per_irq(d);
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return 0;
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}
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#endif
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static struct irq_chip msp_per_irq_controller = {
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.name = "MSP_PER",
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.startup = msp_per_irq_startup,
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.shutdown = msp_per_irq_shutdown,
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.enable = msp_per_irq_enable,
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.disable = msp_per_irq_disable,
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.irq_enable = unmask_per_irq.
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.irq_disable = mask_per_irq,
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.irq_ack = msp_per_irq_ack,
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#ifdef CONFIG_SMP
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.set_affinity = msp_per_irq_set_affinity,
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.irq_set_affinity = msp_per_irq_set_affinity,
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#endif
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.ack = msp_per_irq_ack,
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.end = msp_per_irq_end,
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};
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void __init msp_per_irq_init(void)
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@ -152,10 +113,7 @@ void __init msp_per_irq_init(void)
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*PER_INT_STS_REG = 0xFFFFFFFF;
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/* initialize all the IRQ descriptors */
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for (i = MSP_PER_INTBASE; i < MSP_PER_INTBASE + 32; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = NULL;
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irq_desc[i].depth = 1;
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irq_desc[i].chip = &msp_per_irq_controller;
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irq_set_chip(i, &msp_per_irq_controller);
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#ifdef CONFIG_MIPS_MT_SMTC
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irq_hwmask[i] = C_IRQ4;
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#endif
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@ -173,7 +131,5 @@ void msp_per_irq_dispatch(void)
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do_IRQ(ffs(pending) + MSP_PER_INTBASE - 1);
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} else {
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spurious_interrupt();
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/* Re-enable the CIC cascaded interrupt and return */
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irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
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}
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}
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@ -21,8 +21,10 @@
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#include <msp_slp_int.h>
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#include <msp_regs.h>
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static inline void unmask_msp_slp_irq(unsigned int irq)
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static inline void unmask_msp_slp_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
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@ -30,8 +32,10 @@ static inline void unmask_msp_slp_irq(unsigned int irq)
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*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
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}
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static inline void mask_msp_slp_irq(unsigned int irq)
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static inline void mask_msp_slp_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
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@ -43,8 +47,10 @@ static inline void mask_msp_slp_irq(unsigned int irq)
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* While we ack the interrupt interrupts are disabled and thus we don't need
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* to deal with concurrency issues. Same for msp_slp_irq_end.
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*/
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static inline void ack_msp_slp_irq(unsigned int irq)
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static inline void ack_msp_slp_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
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@ -54,9 +60,9 @@ static inline void ack_msp_slp_irq(unsigned int irq)
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static struct irq_chip msp_slp_irq_controller = {
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.name = "MSP_SLP",
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.ack = ack_msp_slp_irq,
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.mask = mask_msp_slp_irq,
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.unmask = unmask_msp_slp_irq,
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.irq_ack = ack_msp_slp_irq,
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.irq_mask = mask_msp_slp_irq,
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.irq_unmask = unmask_msp_slp_irq,
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};
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void __init msp_slp_irq_init(void)
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