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drm/xe/guc: Enable WA_DUAL_QUEUE for newer platforms

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The DUAL_QUEUE_WA tells the GuC to not allow concurrent submissions
on RCS and CCSes with different address spaces, which on DG2 is
required as a WA for an HW bug. On newer platforms, this block has
been moved in HW at the CS level, by stalling the RCS/CCS context
switch when one of the other RCS/CCSes is busy with a different
address space. While functionally correct, having a submission
stalled on the HW limits the GuC ability to shuffle things around and
can cause complications if the non-stalled submission runs for a long
time, because the GuC doesn't know that the stalled submission isn't
actually running and might declare it as hung. Therefore, we enable
the DUAL_QUEUE_WA on all newer platforms to move management back to
the GuC.

Note that the GuC specs also recommend enabling this for all platforms
starting from MTL that have a CCS.

v2: only apply the WA on GTs that have CCS engines
v3: split comment (Jonathan)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Jesus Narvaez <jesus.narvaez@intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241213181012.2178794-1-daniele.ceraolospurio@intel.com
This commit is contained in:
Daniele Ceraolo Spurio 2024-12-13 10:10:12 -08:00
parent cda06412c0
commit d9a1ae0d17
1 changed files with 29 additions and 1 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

30
drivers/gpu/drm/xe/xe_guc.c
View file

@ -147,6 +147,34 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
static bool needs_wa_dual_queue(struct xe_gt *gt)
{
/*
* The DUAL_QUEUE_WA tells the GuC to not allow concurrent submissions
* on RCS and CCSes with different address spaces, which on DG2 is
* required as a WA for an HW bug.
*/
if (XE_WA(gt, 22011391025))
return true;
/*
* On newer platforms, the HW has been updated to not allow parallel
* execution of different address spaces, so the RCS/CCS will stall the
* context switch if one of the other RCS/CCSes is busy with a different
* address space. While functionally correct, having a submission
* stalled on the HW limits the GuC ability to shuffle things around and
* can cause complications if the non-stalled submission runs for a long
* time, because the GuC doesn't know that the stalled submission isn't
* actually running and might declare it as hung. Therefore, we enable
* the DUAL_QUEUE_WA on all newer platforms on GTs that have CCS engines
* to move management back to the GuC.
*/
if (CCS_MASK(gt) && GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)
return true;
return false;
}
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
@ -159,7 +187,7 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 14014475959))
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
if (XE_WA(gt, 22011391025))
if (needs_wa_dual_queue(gt))
flags |= GUC_WA_DUAL_QUEUE;
/*