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	x86/resctrl: Add interface to read mbm_total_bytes_config
The event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_total_bytes_config is set to 0x7f to count all the event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config 0=0x7f;1=0x7f;2=0x7f;3=0x7f In this case, the event mbm_total_bytes is configured with 0x7f on domains 0 to 3. Signed-off-by: Babu Moger <babu.moger@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://lore.kernel.org/r/20230113152039.770054-10-babu.moger@amd.com
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					 4 changed files with 130 additions and 1 deletions
				
			
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					@ -1062,6 +1062,7 @@
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/* - AMD: */
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					/* - AMD: */
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#define MSR_IA32_MBA_BW_BASE		0xc0000200
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					#define MSR_IA32_MBA_BW_BASE		0xc0000200
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#define MSR_IA32_SMBA_BW_BASE		0xc0000280
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					#define MSR_IA32_SMBA_BW_BASE		0xc0000280
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					#define MSR_IA32_EVT_CFG_BASE		0xc0000400
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/* MSR_IA32_VMX_MISC bits */
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					/* MSR_IA32_VMX_MISC bits */
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#define MSR_IA32_VMX_MISC_INTEL_PT                 (1ULL << 14)
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					#define MSR_IA32_VMX_MISC_INTEL_PT                 (1ULL << 14)
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					@ -30,6 +30,29 @@
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 */
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					 */
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#define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE)
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					#define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE)
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					/* Reads to Local DRAM Memory */
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					#define READS_TO_LOCAL_MEM		BIT(0)
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					/* Reads to Remote DRAM Memory */
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					#define READS_TO_REMOTE_MEM		BIT(1)
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					/* Non-Temporal Writes to Local Memory */
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					#define NON_TEMP_WRITE_TO_LOCAL_MEM	BIT(2)
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					/* Non-Temporal Writes to Remote Memory */
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					#define NON_TEMP_WRITE_TO_REMOTE_MEM	BIT(3)
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					/* Reads to Local Memory the system identifies as "Slow Memory" */
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					#define READS_TO_LOCAL_S_MEM		BIT(4)
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					/* Reads to Remote Memory the system identifies as "Slow Memory" */
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					#define READS_TO_REMOTE_S_MEM		BIT(5)
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					/* Dirty Victims to All Types of Memory */
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					#define DIRTY_VICTIMS_TO_ALL_MEM	BIT(6)
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					/* Max event bits supported */
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					#define MAX_EVT_CONFIG_BITS		GENMASK(6, 0)
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struct rdt_fs_context {
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					struct rdt_fs_context {
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	struct kernfs_fs_context	kfc;
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						struct kernfs_fs_context	kfc;
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					@ -531,5 +554,6 @@ bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d);
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void __check_limbo(struct rdt_domain *d, bool force_free);
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					void __check_limbo(struct rdt_domain *d, bool force_free);
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void rdt_domain_reconfigure_cdp(struct rdt_resource *r);
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					void rdt_domain_reconfigure_cdp(struct rdt_resource *r);
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void __init thread_throttle_mode_init(void);
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					void __init thread_throttle_mode_init(void);
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					void __init mbm_config_rftype_init(const char *config);
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#endif /* _ASM_X86_RESCTRL_INTERNAL_H */
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					#endif /* _ASM_X86_RESCTRL_INTERNAL_H */
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					@ -801,8 +801,10 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r)
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		return ret;
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							return ret;
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	if (rdt_cpu_has(X86_FEATURE_BMEC)) {
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						if (rdt_cpu_has(X86_FEATURE_BMEC)) {
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		if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL))
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							if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) {
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			mbm_total_event.configurable = true;
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								mbm_total_event.configurable = true;
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								mbm_config_rftype_init("mbm_total_bytes_config");
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							}
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		if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL))
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							if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL))
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			mbm_local_event.configurable = true;
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								mbm_local_event.configurable = true;
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	}
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						}
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					@ -1420,6 +1420,93 @@ static int rdtgroup_size_show(struct kernfs_open_file *of,
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	return ret;
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						return ret;
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}
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					}
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					struct mon_config_info {
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						u32 evtid;
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						u32 mon_config;
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					};
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					#define INVALID_CONFIG_INDEX   UINT_MAX
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					/**
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					 * mon_event_config_index_get - get the hardware index for the
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					 *                              configurable event
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					 * @evtid: event id.
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					 *
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					 * Return: 0 for evtid == QOS_L3_MBM_TOTAL_EVENT_ID
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					 *         1 for evtid == QOS_L3_MBM_LOCAL_EVENT_ID
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					 *         INVALID_CONFIG_INDEX for invalid evtid
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					 */
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					static inline unsigned int mon_event_config_index_get(u32 evtid)
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					{
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						switch (evtid) {
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						case QOS_L3_MBM_TOTAL_EVENT_ID:
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							return 0;
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						case QOS_L3_MBM_LOCAL_EVENT_ID:
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							return 1;
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						default:
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							/* Should never reach here */
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							return INVALID_CONFIG_INDEX;
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						}
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					}
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					static void mon_event_config_read(void *info)
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					{
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						struct mon_config_info *mon_info = info;
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						unsigned int index;
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						u32 h;
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						index = mon_event_config_index_get(mon_info->evtid);
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						if (index == INVALID_CONFIG_INDEX) {
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							pr_warn_once("Invalid event id %d\n", mon_info->evtid);
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							return;
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						}
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						rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h);
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						/* Report only the valid event configuration bits */
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						mon_info->mon_config &= MAX_EVT_CONFIG_BITS;
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					}
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					static void mondata_config_read(struct rdt_domain *d, struct mon_config_info *mon_info)
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					{
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						smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1);
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					}
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					static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32 evtid)
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					{
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						struct mon_config_info mon_info = {0};
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						struct rdt_domain *dom;
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						bool sep = false;
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						mutex_lock(&rdtgroup_mutex);
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						list_for_each_entry(dom, &r->domains, list) {
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							if (sep)
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								seq_puts(s, ";");
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							memset(&mon_info, 0, sizeof(struct mon_config_info));
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							mon_info.evtid = evtid;
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							mondata_config_read(dom, &mon_info);
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							seq_printf(s, "%d=0x%02x", dom->id, mon_info.mon_config);
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							sep = true;
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						}
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						seq_puts(s, "\n");
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						mutex_unlock(&rdtgroup_mutex);
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						return 0;
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					}
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					static int mbm_total_bytes_config_show(struct kernfs_open_file *of,
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									       struct seq_file *seq, void *v)
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					{
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						struct rdt_resource *r = of->kn->parent->priv;
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						mbm_config_show(seq, r, QOS_L3_MBM_TOTAL_EVENT_ID);
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						return 0;
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					}
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/* rdtgroup information files for one cache resource. */
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					/* rdtgroup information files for one cache resource. */
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static struct rftype res_common_files[] = {
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					static struct rftype res_common_files[] = {
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	{
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						{
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					@ -1518,6 +1605,12 @@ static struct rftype res_common_files[] = {
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		.seq_show	= max_threshold_occ_show,
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							.seq_show	= max_threshold_occ_show,
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		.fflags		= RF_MON_INFO | RFTYPE_RES_CACHE,
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							.fflags		= RF_MON_INFO | RFTYPE_RES_CACHE,
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	},
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						},
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						{
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							.name		= "mbm_total_bytes_config",
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							.mode		= 0444,
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							.kf_ops		= &rdtgroup_kf_single_ops,
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							.seq_show	= mbm_total_bytes_config_show,
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						},
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	{
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						{
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		.name		= "cpus",
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							.name		= "cpus",
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		.mode		= 0644,
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							.mode		= 0644,
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					@ -1624,6 +1717,15 @@ void __init thread_throttle_mode_init(void)
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	rft->fflags = RF_CTRL_INFO | RFTYPE_RES_MB;
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						rft->fflags = RF_CTRL_INFO | RFTYPE_RES_MB;
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}
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					}
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					void __init mbm_config_rftype_init(const char *config)
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					{
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						struct rftype *rft;
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						rft = rdtgroup_get_rftype_by_name(config);
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						if (rft)
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							rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE;
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					}
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/**
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					/**
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 * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file
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					 * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file
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 * @r: The resource group with which the file is associated.
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					 * @r: The resource group with which the file is associated.
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