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	spi: orion: support armada extended baud rates
The Armada SoC family implementation of this SPI hardware module has extended the configuration register to allow for a wider range of SPI clock rates. Specifically the Serial Baud Rate Pre-selection bits in the SPI Interface Configuration Register now also use bits 6 and 7 as well. Modify the baud rate calculation to handle these differences for the Armada case. Potentially a baud rate can be setup using a number of different pre-scalar and scalar combinations. This code tries all possible pre-scalar divisors (8 in total) to try and find the most accurate set. This change introduces (and documents) a new device tree compatible device name "armada-370-spi" to support this. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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					 2 changed files with 95 additions and 23 deletions
				
			
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			@ -1,7 +1,7 @@
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Marvell Orion SPI device
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Required properties:
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- compatible : should be "marvell,orion-spi".
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- compatible : should be "marvell,orion-spi" or "marvell,armada-370-spi".
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- reg : offset and length of the register set for the device
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- cell-index : Which of multiple SPI controllers is this.
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Optional properties:
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			@ -18,6 +18,7 @@
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/sizes.h>
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#include <asm/unaligned.h>
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			@ -40,13 +41,27 @@
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#define ORION_SPI_MODE_CPHA		(1 << 12)
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#define ORION_SPI_IF_8_16_BIT_MODE	(1 << 5)
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#define ORION_SPI_CLK_PRESCALE_MASK	0x1F
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#define ARMADA_SPI_CLK_PRESCALE_MASK	0xDF
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#define ORION_SPI_MODE_MASK		(ORION_SPI_MODE_CPOL | \
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					 ORION_SPI_MODE_CPHA)
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enum orion_spi_type {
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	ORION_SPI,
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	ARMADA_SPI,
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};
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struct orion_spi_dev {
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	enum orion_spi_type	typ;
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	unsigned int		min_divisor;
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	unsigned int		max_divisor;
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	u32			prescale_mask;
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};
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struct orion_spi {
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	struct spi_master	*master;
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	void __iomem		*base;
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	struct clk              *clk;
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	const struct orion_spi_dev *devdata;
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};
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static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
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			@ -83,30 +98,66 @@ static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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	u32 prescale;
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	u32 reg;
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	struct orion_spi *orion_spi;
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	const struct orion_spi_dev *devdata;
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	orion_spi = spi_master_get_devdata(spi->master);
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	devdata = orion_spi->devdata;
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	tclk_hz = clk_get_rate(orion_spi->clk);
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	/*
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	 * the supported rates are: 4,6,8...30
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	 * round up as we look for equal or less speed
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	 */
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	rate = DIV_ROUND_UP(tclk_hz, speed);
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	rate = roundup(rate, 2);
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	if (devdata->typ == ARMADA_SPI) {
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		unsigned int clk, spr, sppr, sppr2, err;
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		unsigned int best_spr, best_sppr, best_err;
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	/* check if requested speed is too small */
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	if (rate > 30)
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		return -EINVAL;
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		best_err = speed;
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		best_spr = 0;
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		best_sppr = 0;
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	if (rate < 4)
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		rate = 4;
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		/* Iterate over the valid range looking for best fit */
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		for (sppr = 0; sppr < 8; sppr++) {
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			sppr2 = 0x1 << sppr;
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	/* Convert the rate to SPI clock divisor value.	*/
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	prescale = 0x10 + rate/2;
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			spr = tclk_hz / sppr2;
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			spr = DIV_ROUND_UP(spr, speed);
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			if ((spr == 0) || (spr > 15))
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				continue;
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			clk = tclk_hz / (spr * sppr2);
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			err = speed - clk;
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			if (err < best_err) {
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				best_spr = spr;
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				best_sppr = sppr;
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				best_err = err;
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			}
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		}
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		if ((best_sppr == 0) && (best_spr == 0))
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			return -EINVAL;
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		prescale = ((best_sppr & 0x6) << 5) |
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			((best_sppr & 0x1) << 4) | best_spr;
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	} else {
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		/*
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		 * the supported rates are: 4,6,8...30
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		 * round up as we look for equal or less speed
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		 */
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		rate = DIV_ROUND_UP(tclk_hz, speed);
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		rate = roundup(rate, 2);
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		/* check if requested speed is too small */
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		if (rate > 30)
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			return -EINVAL;
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		if (rate < 4)
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			rate = 4;
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		/* Convert the rate to SPI clock divisor value.	*/
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		prescale = 0x10 + rate/2;
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	}
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	reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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	reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
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	reg = ((reg & ~devdata->prescale_mask) | prescale);
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	writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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	return 0;
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			@ -342,8 +393,31 @@ static int orion_spi_reset(struct orion_spi *orion_spi)
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	return 0;
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}
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static const struct orion_spi_dev orion_spi_dev_data = {
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	.typ = ORION_SPI,
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	.min_divisor = 4,
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	.max_divisor = 30,
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	.prescale_mask = ORION_SPI_CLK_PRESCALE_MASK,
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};
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static const struct orion_spi_dev armada_spi_dev_data = {
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	.typ = ARMADA_SPI,
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	.min_divisor = 1,
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	.max_divisor = 1920,
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	.prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK,
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};
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static const struct of_device_id orion_spi_of_match_table[] = {
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	{ .compatible = "marvell,orion-spi", .data = &orion_spi_dev_data, },
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	{ .compatible = "marvell,armada-370-spi", .data = &armada_spi_dev_data, },
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	{}
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};
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MODULE_DEVICE_TABLE(of, orion_spi_of_match_table);
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static int orion_spi_probe(struct platform_device *pdev)
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{
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	const struct of_device_id *of_id;
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	const struct orion_spi_dev *devdata;
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	struct spi_master *master;
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	struct orion_spi *spi;
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	struct resource *r;
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			@ -378,6 +452,10 @@ static int orion_spi_probe(struct platform_device *pdev)
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	spi = spi_master_get_devdata(master);
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	spi->master = master;
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	of_id = of_match_device(orion_spi_of_match_table, &pdev->dev);
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	devdata = of_id->data;
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	spi->devdata = devdata;
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	spi->clk = devm_clk_get(&pdev->dev, NULL);
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	if (IS_ERR(spi->clk)) {
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		status = PTR_ERR(spi->clk);
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			@ -389,8 +467,8 @@ static int orion_spi_probe(struct platform_device *pdev)
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		goto out;
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	tclk_hz = clk_get_rate(spi->clk);
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	master->max_speed_hz = DIV_ROUND_UP(tclk_hz, 4);
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	master->min_speed_hz = DIV_ROUND_UP(tclk_hz, 30);
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	master->max_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->min_divisor);
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	master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor);
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	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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	spi->base = devm_ioremap_resource(&pdev->dev, r);
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			@ -469,12 +547,6 @@ static const struct dev_pm_ops orion_spi_pm_ops = {
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			   NULL)
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};
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static const struct of_device_id orion_spi_of_match_table[] = {
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	{ .compatible = "marvell,orion-spi", },
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	{}
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};
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MODULE_DEVICE_TABLE(of, orion_spi_of_match_table);
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static struct platform_driver orion_spi_driver = {
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	.driver = {
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		.name	= DRIVER_NAME,
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