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	mm, x86/mm: Make the batched unmap TLB flush API more generic
try_to_unmap_flush() used to open-code a rather x86-centric flush sequence: local_flush_tlb() + flush_tlb_others(). Rearrange the code so that the arch (only x86 for now) provides arch_tlbbatch_add_mm() and arch_tlbbatch_flush() and the core code calls those functions instead. I'll want this for x86 because, to enable address space ids, I can't support the flush_tlb_others() mode used by exising try_to_unmap_flush() implementation with good performance. I can support the new API fairly easily, though. I imagine that other architectures may be in a similar position. Architectures with strong remote flush primitives (arm64?) may have even worse performance problems with flush_tlb_others() the way that try_to_unmap_flush() uses it. Signed-off-by: Andy Lutomirski <luto@kernel.org> Acked-by: Kees Cook <keescook@chromium.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Borislav Petkov <bpetkov@suse.de> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mel Gorman <mgorman@suse.de> Cc: Michal Hocko <mhocko@suse.com> Cc: Nadav Amit <nadav.amit@gmail.com> Cc: Nadav Amit <namit@vmware.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Sasha Levin <sasha.levin@oracle.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/19f25a8581f9fb77876b7ff3b001f89835e34ea3.1495492063.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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					 5 changed files with 54 additions and 18 deletions
				
			
		
							
								
								
									
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								arch/x86/include/asm/tlbbatch.h
									
									
									
									
									
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								arch/x86/include/asm/tlbbatch.h
									
									
									
									
									
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#ifndef _ARCH_X86_TLBBATCH_H
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#define _ARCH_X86_TLBBATCH_H
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#include <linux/cpumask.h>
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#ifdef CONFIG_SMP
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struct arch_tlbflush_unmap_batch {
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	/*
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	 * Each bit set is a CPU that potentially has a TLB entry for one of
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	 * the PFNs being flushed..
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	 */
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	struct cpumask cpumask;
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};
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#endif
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#endif /* _ARCH_X86_TLBBATCH_H */
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			@ -329,6 +329,14 @@ static inline void reset_lazy_tlbstate(void)
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	this_cpu_write(cpu_tlbstate.active_mm, &init_mm);
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}
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static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch,
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					struct mm_struct *mm)
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{
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	cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm));
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}
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extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch);
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#endif	/* SMP */
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#ifndef CONFIG_PARAVIRT
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			@ -395,6 +395,23 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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	}
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}
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void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
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{
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	int cpu = get_cpu();
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	if (cpumask_test_cpu(cpu, &batch->cpumask)) {
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		count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
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		local_flush_tlb();
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		trace_tlb_flush(TLB_LOCAL_SHOOTDOWN, TLB_FLUSH_ALL);
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	}
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	if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids)
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		flush_tlb_others(&batch->cpumask, NULL, 0, TLB_FLUSH_ALL);
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	cpumask_clear(&batch->cpumask);
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	put_cpu();
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}
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static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
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			     size_t count, loff_t *ppos)
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{
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			@ -14,6 +14,10 @@
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#include <asm/page.h>
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#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
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#include <asm/tlbbatch.h>
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#endif
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#define USE_SPLIT_PTE_PTLOCKS	(NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS)
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#define USE_SPLIT_PMD_PTLOCKS	(USE_SPLIT_PTE_PTLOCKS && \
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		IS_ENABLED(CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK))
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			@ -67,12 +71,15 @@ struct page_frag {
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struct tlbflush_unmap_batch {
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#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
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	/*
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	 * Each bit set is a CPU that potentially has a TLB entry for one of
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	 * the PFNs being flushed. See set_tlb_ubc_flush_pending().
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	 * The arch code makes the following promise: generic code can modify a
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	 * PTE, then call arch_tlbbatch_add_mm() (which internally provides all
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	 * needed barriers), then call arch_tlbbatch_flush(), and the entries
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	 * will be flushed on all CPUs by the time that arch_tlbbatch_flush()
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	 * returns.
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	 */
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	struct cpumask cpumask;
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	struct arch_tlbflush_unmap_batch arch;
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	/* True if any bit in cpumask is set */
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	/* True if a flush is needed. */
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	bool flush_required;
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	/*
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								mm/rmap.c
									
									
									
									
									
								
							
							
						
						
									
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								mm/rmap.c
									
									
									
									
									
								
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			@ -579,25 +579,13 @@ void page_unlock_anon_vma_read(struct anon_vma *anon_vma)
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void try_to_unmap_flush(void)
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{
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	struct tlbflush_unmap_batch *tlb_ubc = ¤t->tlb_ubc;
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	int cpu;
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	if (!tlb_ubc->flush_required)
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		return;
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	cpu = get_cpu();
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	if (cpumask_test_cpu(cpu, &tlb_ubc->cpumask)) {
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		count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
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		local_flush_tlb();
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		trace_tlb_flush(TLB_LOCAL_SHOOTDOWN, TLB_FLUSH_ALL);
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	}
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	if (cpumask_any_but(&tlb_ubc->cpumask, cpu) < nr_cpu_ids)
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		flush_tlb_others(&tlb_ubc->cpumask, NULL, 0, TLB_FLUSH_ALL);
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	cpumask_clear(&tlb_ubc->cpumask);
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	arch_tlbbatch_flush(&tlb_ubc->arch);
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	tlb_ubc->flush_required = false;
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	tlb_ubc->writable = false;
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	put_cpu();
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}
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/* Flush iff there are potentially writable TLB entries that can race with IO */
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			@ -613,7 +601,7 @@ static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable)
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{
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	struct tlbflush_unmap_batch *tlb_ubc = ¤t->tlb_ubc;
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	cpumask_or(&tlb_ubc->cpumask, &tlb_ubc->cpumask, mm_cpumask(mm));
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	arch_tlbbatch_add_mm(&tlb_ubc->arch, mm);
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	tlb_ubc->flush_required = true;
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	/*
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