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x86/mm: Carve out INVLPG inline asm for use by others

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No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes
This commit is contained in:
Borislav Petkov (AMD) 2024-11-19 12:21:32 +01:00
parent d9bb405446
commit f1d84b59cb
2 changed files with 6 additions and 1 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

4
arch/x86/include/asm/tlb.h
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@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table)
free_page_and_swap_cache(table); free_page_and_swap_cache(table);
} }
static inline void invlpg(unsigned long addr)
{
asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
}
#endif /* _ASM_X86_TLB_H */ #endif /* _ASM_X86_TLB_H */

3
arch/x86/mm/tlb.c
View file

@ -20,6 +20,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/apic.h> #include <asm/apic.h>
#include <asm/perf_event.h> #include <asm/perf_event.h>
#include <asm/tlb.h>
#include "mm_internal.h" #include "mm_internal.h"
@ -1140,7 +1141,7 @@ STATIC_NOPV void native_flush_tlb_one_user(unsigned long addr)
bool cpu_pcide; bool cpu_pcide;
/* Flush 'addr' from the kernel PCID: */ /* Flush 'addr' from the kernel PCID: */
asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); invlpg(addr);
/* If PTI is off there is no user PCID and nothing to flush. */ /* If PTI is off there is no user PCID and nothing to flush. */
if (!static_cpu_has(X86_FEATURE_PTI)) if (!static_cpu_has(X86_FEATURE_PTI))