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	ptp_qoriq: fix overflow in ptp_qoriq_adjfine() u64 calcalation
Current calculation for diff of TMR_ADD register value may have 64-bit overflow in this code line, when long type scaled_ppm is large. adj *= scaled_ppm; This patch is to resolve it by using mul_u64_u64_div_u64(). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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					 1 changed files with 7 additions and 6 deletions
				
			
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					@ -189,15 +189,16 @@ int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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	tmr_add = ptp_qoriq->tmr_add;
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						tmr_add = ptp_qoriq->tmr_add;
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	adj = tmr_add;
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						adj = tmr_add;
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	/* calculate diff as adj*(scaled_ppm/65536)/1000000
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						/*
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	 * and round() to the nearest integer
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						 * Calculate diff and round() to the nearest integer
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						 *
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						 * diff = adj * (ppb / 1000000000)
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						 *      = adj * scaled_ppm / 65536000000
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	 */
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						 */
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	adj *= scaled_ppm;
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						diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
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	diff = div_u64(adj, 8000000);
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						diff = DIV64_U64_ROUND_UP(diff, 2);
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	diff = (diff >> 13) + ((diff >> 12) & 1);
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	tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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						tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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	ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
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						ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
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	return 0;
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						return 0;
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