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Author SHA1 Message Date
Masahiro Yamada
dd34b11566 ARM: uniphier: remove SoC-specific SMP code 
The UniPhier architecture (32bit) switched over to PSCI.  Remove
the SoC-specific SMP operations.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
 2016-08-29 01:57:14 +09:00
Masahiro Yamada
e7ecbc057b ARM: uniphier: add outer cache support 
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
 2015-10-27 09:20:50 +09:00