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The (typeof(foo)) construct is unusual in the kernel, use a more typical syntax by explicitly spelling out the type. Link: https://lore.kernel.org/all/20250909-gpio-mmio-gpio-conv-part4-v1-13-9f723dc3524a@linaro.org/ Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/20250910-make-compound-literals-normal-again-v1-3-076ee7738a0b@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
246 lines
6.6 KiB
C
246 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Abilis Systems MODULE DESCRIPTION
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*
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* Copyright (C) Abilis Systems 2013
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*
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* Authors: Sascha Leuenberger <sascha.leuenberger@abilis.com>
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* Christian Ruppert <christian.ruppert@abilis.com>
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*/
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#include <linux/bitops.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/generic.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define TB10X_GPIO_DIR_IN (0x00000000)
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#define TB10X_GPIO_DIR_OUT (0x00000001)
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#define OFFSET_TO_REG_DDR (0x00)
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#define OFFSET_TO_REG_DATA (0x04)
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#define OFFSET_TO_REG_INT_EN (0x08)
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#define OFFSET_TO_REG_CHANGE (0x0C)
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#define OFFSET_TO_REG_WRMASK (0x10)
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#define OFFSET_TO_REG_INT_TYPE (0x14)
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/**
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* @base: register base address
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* @domain: IRQ domain of GPIO generated interrupts managed by this controller
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* @irq: Interrupt line of parent interrupt controller
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* @chip: Generic GPIO chip structure associated with this GPIO controller
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*/
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struct tb10x_gpio {
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void __iomem *base;
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struct irq_domain *domain;
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int irq;
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struct gpio_generic_chip chip;
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};
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static inline u32 tb10x_reg_read(struct tb10x_gpio *gpio, unsigned int offs)
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{
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return ioread32(gpio->base + offs);
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}
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static inline void tb10x_reg_write(struct tb10x_gpio *gpio, unsigned int offs,
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u32 val)
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{
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iowrite32(val, gpio->base + offs);
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}
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static inline void tb10x_set_bits(struct tb10x_gpio *gpio, unsigned int offs,
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u32 mask, u32 val)
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{
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u32 r;
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guard(gpio_generic_lock_irqsave)(&gpio->chip);
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r = tb10x_reg_read(gpio, offs);
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r = (r & ~mask) | (val & mask);
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tb10x_reg_write(gpio, offs, r);
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}
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static int tb10x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip);
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return irq_create_mapping(tb10x_gpio->domain, offset);
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}
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static int tb10x_gpio_irq_set_type(struct irq_data *data, unsigned int type)
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{
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if ((type & IRQF_TRIGGER_MASK) != IRQ_TYPE_EDGE_BOTH) {
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pr_err("Only (both) edge triggered interrupts supported.\n");
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return -EINVAL;
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}
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irqd_set_trigger_type(data, type);
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return IRQ_SET_MASK_OK;
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}
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static irqreturn_t tb10x_gpio_irq_cascade(int irq, void *data)
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{
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struct tb10x_gpio *tb10x_gpio = data;
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u32 r = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_CHANGE);
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u32 m = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_INT_EN);
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const unsigned long bits = r & m;
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int i;
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for_each_set_bit(i, &bits, 32)
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generic_handle_domain_irq(tb10x_gpio->domain, i);
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return IRQ_HANDLED;
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}
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static int tb10x_gpio_probe(struct platform_device *pdev)
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{
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struct gpio_generic_chip_config config;
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struct tb10x_gpio *tb10x_gpio;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int ret = -EBUSY;
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u32 ngpio;
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if (!np)
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return -EINVAL;
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if (of_property_read_u32(np, "abilis,ngpio", &ngpio))
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return -EINVAL;
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tb10x_gpio = devm_kzalloc(dev, sizeof(*tb10x_gpio), GFP_KERNEL);
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if (tb10x_gpio == NULL)
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return -ENOMEM;
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tb10x_gpio->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(tb10x_gpio->base))
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return PTR_ERR(tb10x_gpio->base);
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tb10x_gpio->chip.gc.label =
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devm_kasprintf(dev, GFP_KERNEL, "%pOF", pdev->dev.of_node);
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if (!tb10x_gpio->chip.gc.label)
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return -ENOMEM;
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/*
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* Initialize generic GPIO with one single register for reading and setting
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* the lines, no special set or clear registers and a data direction register
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* wher 1 means "output".
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*/
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config = (struct gpio_generic_chip_config) {
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.dev = dev,
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.sz = 4,
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.dat = tb10x_gpio->base + OFFSET_TO_REG_DATA,
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.dirout = tb10x_gpio->base + OFFSET_TO_REG_DDR,
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};
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ret = gpio_generic_chip_init(&tb10x_gpio->chip, &config);
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if (ret) {
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dev_err(dev, "unable to init generic GPIO\n");
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return ret;
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}
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tb10x_gpio->chip.gc.base = -1;
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tb10x_gpio->chip.gc.parent = dev;
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tb10x_gpio->chip.gc.owner = THIS_MODULE;
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/*
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* ngpio is set by gpio_generic_chip_init() but we override it, this
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* .request() callback also overrides the one set up by generic GPIO.
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*/
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tb10x_gpio->chip.gc.ngpio = ngpio;
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tb10x_gpio->chip.gc.request = gpiochip_generic_request;
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tb10x_gpio->chip.gc.free = gpiochip_generic_free;
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ret = devm_gpiochip_add_data(dev, &tb10x_gpio->chip.gc, tb10x_gpio);
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if (ret < 0) {
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dev_err(dev, "Could not add gpiochip.\n");
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return ret;
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}
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platform_set_drvdata(pdev, tb10x_gpio);
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if (of_property_read_bool(np, "interrupt-controller")) {
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struct irq_chip_generic *gc;
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ret = platform_get_irq(pdev, 0);
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if (ret < 0)
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return ret;
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tb10x_gpio->chip.gc.to_irq = tb10x_gpio_to_irq;
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tb10x_gpio->irq = ret;
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ret = devm_request_irq(dev, ret, tb10x_gpio_irq_cascade,
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IRQF_TRIGGER_NONE | IRQF_SHARED,
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dev_name(dev), tb10x_gpio);
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if (ret != 0)
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return ret;
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tb10x_gpio->domain = irq_domain_create_linear(dev_fwnode(dev),
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tb10x_gpio->chip.gc.ngpio,
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&irq_generic_chip_ops, NULL);
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if (!tb10x_gpio->domain) {
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return -ENOMEM;
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}
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ret = irq_alloc_domain_generic_chips(tb10x_gpio->domain,
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tb10x_gpio->chip.gc.ngpio, 1, tb10x_gpio->chip.gc.label,
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handle_edge_irq, IRQ_NOREQUEST, IRQ_NOPROBE,
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IRQ_GC_INIT_MASK_CACHE);
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if (ret)
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goto err_remove_domain;
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gc = tb10x_gpio->domain->gc->gc[0];
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gc->reg_base = tb10x_gpio->base;
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gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH;
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gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
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gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
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gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
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gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type;
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gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE;
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gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN;
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}
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return 0;
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err_remove_domain:
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irq_domain_remove(tb10x_gpio->domain);
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return ret;
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}
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static void tb10x_gpio_remove(struct platform_device *pdev)
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{
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struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev);
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if (tb10x_gpio->chip.gc.to_irq) {
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irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0],
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BIT(tb10x_gpio->chip.gc.ngpio) - 1, 0, 0);
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kfree(tb10x_gpio->domain->gc);
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irq_domain_remove(tb10x_gpio->domain);
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}
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}
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static const struct of_device_id tb10x_gpio_dt_ids[] = {
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{ .compatible = "abilis,tb10x-gpio" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, tb10x_gpio_dt_ids);
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static struct platform_driver tb10x_gpio_driver = {
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.probe = tb10x_gpio_probe,
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.remove = tb10x_gpio_remove,
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.driver = {
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.name = "tb10x-gpio",
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.of_match_table = tb10x_gpio_dt_ids,
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}
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};
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module_platform_driver(tb10x_gpio_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("tb10x gpio.");
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