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			-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdLMSbAAoJEAx081l5xIa+udkP/iWr8mw44tWYb8Wuzc/aR91v 02X/J4S9XTQttNn/1Gpq9ItTLMf0Gc08tk1wEBBHAWi/qGaGZS2al+rv0afeuuQa aFhQzioDi7K/YZt92iEJhdx7wVMyydICTg3INmYlSP7/FyzLp6gBQRGSJ1kX5mHZ qWsFZgUOH9V5evyB6fDMleDaqFOKfcwrD7XYwbOheL/HeYQSv5AYn3VBupBFQ76L 0hclI5VzZQ5V0nnqRTNDQVA9Yl6NTl+2eXTn5vuBtwKXEI6JJw8eihZp2oZDXqfS L441w7wGbkRPzN5kjMZjs1ToPMTlMveR5kL6Sc+o3DT/HmIr1odeaSDXR/93UOLd z0CRJ6xMC8h1ThLNHp8UgbxCKqIwYPsY2wVqjsJt7lDY5jma7Yv2YJ9ocYGHN/sO DVHcU6ugbwvuC5wZZtVZl5J4hjnBZwNRGSVK+iM0tkjalgdEuSFehXT7eQ8SphF/ yI5gD1xNEwGfZ4bvZ3u/QrDCcpUAgPIUYmxEa2tPJILQWOJ9O87yc0y9Z21k9Ef1 9yDqrFV3sPqC2xj/0ufZG/18+Yt99Ykg1jQE3RGDwD/59KAeqPbOvqTKyVODV9jE qje6ScSIc2G0713uss2bcaD3k+rCB5YL2JkKrk5OWW/T2+n9T+JFaiNh7dnSFFcU gBKyeY24OyCDMwXrby0K =SI+Y -----END PGP SIGNATURE----- Merge tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "The biggest thing in this is the AMD Navi GPU support, this again contains a bunch of header files that are large. These are the new AMD RX5700 GPUs that just recently became available. New drivers: - ST-Ericsson MCDE driver - Ingenic JZ47xx SoC UAPI change: - HDR source metadata property Core: - HDR inforframes and EDID parsing - drm hdmi infoframe unpacking - remove prime sg_table caching into dma-buf - New gem vram helpers to reduce driver code - Lots of drmP.h removal - reservation fencing fix - documentation updates - drm_fb_helper_connector removed - mode name command handler rewrite fbcon: - Remove the fbcon notifiers ttm: - forward progress fixes dma-buf: - make mmap call optional - debugfs refcount fixes - dma-fence free with pending signals fix - each dma-buf gets an inode Panels: - Lots of additional panel bindings amdgpu: - initial navi10 support - avoid hw reset - HDR metadata support - new thermal sensors for vega asics - RAS fixes - use HMM rather than MMU notifier - xgmi topology via kfd - SR-IOV fixes - driver reload fixes - DC use a core bpc attribute - Aux fixes for DC - Bandwidth calc updates for DC - Clock handling refactor - kfd VEGAM support vmwgfx: - Coherent memory support changes i915: - HDR Support - HDMI i2c link - Icelake multi-segmented gamma support - GuC firmware update - Mule Creek Canyon PCH support for EHL - EHL platform updtes - move i915.alpha_support to i915.force_probe - runtime PM refactoring - VBT parsing refactoring - DSI fixes - struct mutex dependency reduction - GEM code reorg mali-dp: - Komeda driver features msm: - dsi vs EPROBE_DEFER fixes - msm8998 snapdragon 835 support - a540 gpu support - mdp5 and dpu interconnect support exynos: - drmP.h removal tegra: - misc fixes tda998x: - audio support improvements - pixel repeated mode support - quantisation range handling corrections - HDMI vendor info fix armada: - interlace support fix - overlay/video plane register handling refactor - add gamma support rockchip: - RX3328 support panfrost: - expose perf counters via hidden ioctls vkms: - enumerate CRC sources list ast: - rework BO handling mgag200: - rework BO handling dw-hdmi: - suspend/resume support rcar-du: - R8A774A1 Soc Support - LVDS dual-link mode support - Additional formats - Misc fixes omapdrm: - DSI command mode display support stm - fb modifier support - runtime PM support sun4i: - use vmap ops vc4: - binner bo binding rework v3d: - compute shader support - resync/sync fixes - job management refactoring lima: - NULL pointer in irq handler fix - scheduler default timeout virtio: - fence seqno support - trace events bochs: - misc fixes tc458767: - IRQ/HDP handling sii902x: - HDMI audio support atmel-hlcdc: - misc fixes meson: - zpos support" * tag 'drm-next-2019-07-16' of git://anongit.freedesktop.org/drm/drm: (1815 commits) Revert "Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next" Revert "mm: adjust apply_to_pfn_range interface for dropped token." mm: adjust apply_to_pfn_range interface for dropped token. drm/amdgpu/navi10: add uclk activity sensor drm/amdgpu: properly guard the generic discovery code drm/amdgpu: add missing documentation on new module parameters drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writeback drm/amd/display: avoid 64-bit division drm/amdgpu/psp11: simplify the ucode register logic drm/amdgpu: properly guard DC support in navi code drm/amd/powerplay: vega20: fix uninitialized variable use drm/amd/display: dcn20: include linux/delay.h amdgpu: make pmu support optional drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq drm/amd/powerplay: Use memset to initialize metrics structs drm/amdgpu/mes10.1: Fix header guard drm/amd/powerplay: add temperature sensor support for navi10 drm/amdgpu: fix scheduler timeout calc drm/amdgpu: Prepare for hmm_range_register API change (v2) ...
		
			
				
	
	
		
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			96 lines
		
	
	
	
		
			2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Copyright (C) 2012 Russell King
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|  */
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| #ifndef ARMADA_CRTC_H
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| #define ARMADA_CRTC_H
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| 
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| #include <drm/drm_crtc.h>
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| 
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| struct armada_gem_object;
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| 
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| struct armada_regs {
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| 	uint32_t offset;
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| 	uint32_t mask;
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| 	uint32_t val;
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| };
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| 
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| #define armada_reg_queue_mod(_r, _i, _v, _m, _o)	\
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| 	do {					\
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| 		struct armada_regs *__reg = _r;	\
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| 		__reg[_i].offset = _o;		\
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| 		__reg[_i].mask = ~(_m);		\
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| 		__reg[_i].val = _v;		\
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| 		_i++;				\
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| 	} while (0)
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| 
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| #define armada_reg_queue_set(_r, _i, _v, _o)	\
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| 	armada_reg_queue_mod(_r, _i, _v, ~0, _o)
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| 
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| #define armada_reg_queue_end(_r, _i)		\
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| 	armada_reg_queue_mod(_r, _i, 0, 0, ~0)
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| 
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| struct armada_crtc;
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| struct armada_variant;
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| 
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| struct armada_crtc {
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| 	struct drm_crtc		crtc;
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| 	const struct armada_variant *variant;
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| 	void			*variant_data;
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| 	unsigned		num;
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| 	void __iomem		*base;
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| 	struct clk		*clk;
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| 	struct {
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| 		uint32_t	spu_v_h_total;
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| 		uint32_t	spu_v_porch;
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| 		uint32_t	spu_adv_reg;
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| 	} v[2];
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| 	bool			interlaced;
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| 	bool			cursor_update;
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| 
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| 	struct armada_gem_object	*cursor_obj;
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| 	int			cursor_x;
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| 	int			cursor_y;
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| 	uint32_t		cursor_hw_pos;
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| 	uint32_t		cursor_hw_sz;
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| 	uint32_t		cursor_w;
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| 	uint32_t		cursor_h;
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| 
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| 	uint32_t		cfg_dumb_ctrl;
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| 	uint32_t		spu_iopad_ctrl;
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| 
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| 	spinlock_t		irq_lock;
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| 	uint32_t		irq_ena;
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| 
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| 	bool			update_pending;
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| 	struct drm_pending_vblank_event *event;
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| 	struct armada_regs	atomic_regs[32];
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| 	struct armada_regs	*regs;
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| 	unsigned int		regs_idx;
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| };
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| #define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
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| 
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| void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
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| 
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| struct armada_clocking_params {
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| 	unsigned long permillage_min;
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| 	unsigned long permillage_max;
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| 	u32 settable;
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| 	u32 div_max;
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| };
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| 
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| struct armada_clk_result {
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| 	unsigned long desired_clk_hz;
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| 	struct clk *clk;
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| 	u32 div;
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| };
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| 
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| int armada_crtc_select_clock(struct armada_crtc *dcrtc,
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| 			     struct armada_clk_result *res,
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| 			     const struct armada_clocking_params *params,
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| 			     struct clk *clks[], size_t num_clks,
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| 			     unsigned long desired_khz);
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| 
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| extern struct platform_driver armada_lcd_platform_driver;
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| 
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| #endif
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