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b1ce4ab06f
Duplicate ast_set_def_ext_reg() for individual chip generations and move call it into per-chip source files. Remove the original code. AST2100 and AST2500 reuse the function from earlier chips. AST2600 appears to be incorrect as it uses an older function. Keep this behavior for now. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/20250706162816.211552-9-tzimmermann@suse.de
129 lines
3.1 KiB
C
129 lines
3.1 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors: Dave Airlie <airlied@redhat.com>
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*/
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <drm/drm_print.h>
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#include "ast_drv.h"
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#include "ast_post.h"
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u32 __ast_mindwm(void __iomem *regs, u32 r)
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{
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u32 data;
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__ast_write32(regs, 0xf004, r & 0xffff0000);
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__ast_write32(regs, 0xf000, 0x1);
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do {
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data = __ast_read32(regs, 0xf004) & 0xffff0000;
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} while (data != (r & 0xffff0000));
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return __ast_read32(regs, 0x10000 + (r & 0x0000ffff));
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}
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void __ast_moutdwm(void __iomem *regs, u32 r, u32 v)
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{
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u32 data;
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__ast_write32(regs, 0xf004, r & 0xffff0000);
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__ast_write32(regs, 0xf000, 0x1);
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do {
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data = __ast_read32(regs, 0xf004) & 0xffff0000;
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} while (data != (r & 0xffff0000));
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__ast_write32(regs, 0x10000 + (r & 0x0000ffff), v);
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}
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u32 ast_mindwm(struct ast_device *ast, u32 r)
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{
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return __ast_mindwm(ast->regs, r);
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}
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void ast_moutdwm(struct ast_device *ast, u32 r, u32 v)
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{
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__ast_moutdwm(ast->regs, r, v);
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}
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int ast_post_gpu(struct ast_device *ast)
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{
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int ret;
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if (AST_GEN(ast) >= 7) {
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ret = ast_2600_post(ast);
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if (ret)
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return ret;
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} else if (AST_GEN(ast) >= 6) {
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ret = ast_2500_post(ast);
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if (ret)
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return ret;
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} else if (AST_GEN(ast) >= 4) {
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ret = ast_2300_post(ast);
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if (ret)
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return ret;
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} else if (AST_GEN(ast) >= 2) {
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ret = ast_2100_post(ast);
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if (ret)
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return ret;
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} else {
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ret = ast_2000_post(ast);
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if (ret)
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return ret;
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}
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return 0;
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}
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#define TIMEOUT 5000000
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bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl)
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{
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u32 data, timeout;
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ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
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ast_moutdwm(ast, 0x1e6e0070, (datagen << 3) | test_ctl);
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timeout = 0;
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do {
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data = ast_mindwm(ast, 0x1e6e0070) & 0x3000;
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if (data & 0x2000)
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return false;
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if (++timeout > TIMEOUT) {
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ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
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return false;
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}
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} while (!data);
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ast_moutdwm(ast, 0x1e6e0070, 0x0);
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return true;
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}
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bool mmc_test_burst(struct ast_device *ast, u32 datagen)
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{
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return mmc_test(ast, datagen, 0xc1);
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}
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