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Some ICL/TGL platforms with combo PHY ports suffer from signal integrity issues at HBR3. While certain systems include a Parade PS8461 mux to mitigate this, its presence cannot be reliably detected. Furthermore, broken or missing VBT entries make it unsafe to rely on VBT for enforcing link rate limits. To address this introduce a device specific quirk to cap the eDP link rate to HBR2 (540000 kHz). This will override any higher advertised rates from the sink or DPCD for specific devices. Currently, the quirk is added for Dell XPS 13 7390 2-in-1 which is reported in gitlab issue #5969 [1]. [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969 v2: Align the quirk with the intended quirk name and refactor the condition to use min(). (Jani) v3: Use condition `rate > 540000`. Drop extra parentheses. (Ville) Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250710052041.1238567-3-ankit.k.nautiyal@intel.com
32 lines
829 B
C
32 lines
829 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_QUIRKS_H__
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#define __INTEL_QUIRKS_H__
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#include <linux/types.h>
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struct intel_display;
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struct intel_dp;
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struct drm_dp_dpcd_ident;
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enum intel_quirk_id {
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QUIRK_BACKLIGHT_PRESENT,
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QUIRK_INCREASE_DDI_DISABLED_TIME,
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QUIRK_INCREASE_T12_DELAY,
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QUIRK_INVERT_BRIGHTNESS,
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QUIRK_LVDS_SSC_DISABLE,
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QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
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QUIRK_FW_SYNC_LEN,
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QUIRK_EDP_LIMIT_RATE_HBR2,
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};
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void intel_init_quirks(struct intel_display *display);
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void intel_init_dpcd_quirks(struct intel_dp *intel_dp,
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const struct drm_dp_dpcd_ident *ident);
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bool intel_has_quirk(struct intel_display *display, enum intel_quirk_id quirk);
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bool intel_has_dpcd_quirk(struct intel_dp *intel_dp, enum intel_quirk_id quirk);
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#endif /* __INTEL_QUIRKS_H__ */
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